Mitigating cache contention-based attacks by logical associativity

Liu, Xiao and Zwolinski, Mark (2022) Mitigating cache contention-based attacks by logical associativity. In PRIME 2022 - 17th International Conference on Ph.D Research in Microelectronics and Electronics, Proceedings. IEEE. pp. 229-232 . (doi:10.1109/PRIME55000.2022.9816809).

Abstract

Many cache designs have been proposed to guard against last-level cache, contention-based, side-channel attacks. One of the most well-known implementations, CEASER-S, applies an encryption cypher with a periodically changing key as a cache indexing function. By increasing the re-keying frequency, CEASER-S can defeat an attack. However, this can lead to performance degradation. In this paper, we propose cache logical associativity. By combining this approach with CEASER-S, our cache, CEASER-SH, sacrifices less performance while maintaining the same security level against more advanced contention-based side-channel attacks. For example, compared with CEASER-S, CEASER-SH with a logical associativity of 3 can reduce the miss rate degradation by about 30% and that of the CPI by 1% while maintaining the same security level against a strong Prime+Probe attack.

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Contributors

Author: Xiao Liu

Author: Mark Zwolinski

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