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Ageing mitigation techniques for SRAM memories

Ageing mitigation techniques for SRAM memories
Ageing mitigation techniques for SRAM memories
As CMOS technology scales down, ageing-induced negative-bias temperature instability (NBTI) becomes more pronounced. The impact of NBTI on memory elements of digital circuits is crucial, in particular, in static random-access memory (SRAM) as it is always subject to ageing for whatever value is stored in an SRAM cell. Moreover, the prolonged storage of the same bit patterns in an SRAM can cause asymmetric NBTI stress, which is manifested by the threshold voltage drifts of pMOS transistors. These long-term ageing threshold voltage drifts degrade the static noise margin (SNM) of SRAM as memory. The degradation in SNM due to asymmetric NBTI stress can lead to read stability issues and potentially cause failures. Furthermore, the impact of NBTI on SRAM is not only limited to its usage as a memory but also as a hardware security primitive, namely, SRAM physical unclonable function (SRAM-PUF). The random and unique start-up values (SUVs) of SRAM-PUF can be used as a cryptographic key. Nevertheless, asymmetric NBTI stress may cause errors in SUVs. As the error in the SUVs increases resulting in an increasing area overhead of error correction code (ECC) which is needed to generate an error-free cryptographic key. Following the aforementioned reliability issues, this chapter presents two case studies of ageing mitigation techniques for SRAM as memory and PUF, respectively.
91-111
Springer
Mispan, Mohd Syafiq
568c91c3-c200-441c-887b-8f299635b94e
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Halak, Basel
8221f839-0dfd-4f81-9865-37def5f79f33
Halak, Basel
Mispan, Mohd Syafiq
568c91c3-c200-441c-887b-8f299635b94e
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Halak, Basel
8221f839-0dfd-4f81-9865-37def5f79f33
Halak, Basel

Mispan, Mohd Syafiq, Zwolinski, Mark and Halak, Basel (2019) Ageing mitigation techniques for SRAM memories. In, Halak, Basel (ed.) Ageing of Integrated Circuits: Causes, Effects and Mitigation Techniques. Springer, pp. 91-111. (doi:10.1007/978-3-030-23781-3_4).

Record type: Book Section

Abstract

As CMOS technology scales down, ageing-induced negative-bias temperature instability (NBTI) becomes more pronounced. The impact of NBTI on memory elements of digital circuits is crucial, in particular, in static random-access memory (SRAM) as it is always subject to ageing for whatever value is stored in an SRAM cell. Moreover, the prolonged storage of the same bit patterns in an SRAM can cause asymmetric NBTI stress, which is manifested by the threshold voltage drifts of pMOS transistors. These long-term ageing threshold voltage drifts degrade the static noise margin (SNM) of SRAM as memory. The degradation in SNM due to asymmetric NBTI stress can lead to read stability issues and potentially cause failures. Furthermore, the impact of NBTI on SRAM is not only limited to its usage as a memory but also as a hardware security primitive, namely, SRAM physical unclonable function (SRAM-PUF). The random and unique start-up values (SUVs) of SRAM-PUF can be used as a cryptographic key. Nevertheless, asymmetric NBTI stress may cause errors in SUVs. As the error in the SUVs increases resulting in an increasing area overhead of error correction code (ECC) which is needed to generate an error-free cryptographic key. Following the aforementioned reliability issues, this chapter presents two case studies of ageing mitigation techniques for SRAM as memory and PUF, respectively.

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More information

Published date: 1 October 2019

Identifiers

Local EPrints ID: 473039
URI: http://eprints.soton.ac.uk/id/eprint/473039
PURE UUID: 65275654-b1cf-4539-a5b7-40ba11125837
ORCID for Mark Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X
ORCID for Basel Halak: ORCID iD orcid.org/0000-0003-3470-7226

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Date deposited: 09 Jan 2023 18:22
Last modified: 06 Jun 2024 01:49

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Contributors

Author: Mohd Syafiq Mispan
Author: Mark Zwolinski ORCID iD
Author: Basel Halak ORCID iD
Editor: Basel Halak

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