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A self-adaptive SEU mitigation scheme for embedded systems in extreme radiation environments

A self-adaptive SEU mitigation scheme for embedded systems in extreme radiation environments
A self-adaptive SEU mitigation scheme for embedded systems in extreme radiation environments

When electronic systems are working in radiation environments, transient errors, and permanent errors may occur. Static random-access memory (SRAM) has been the one of most significant parts in various semiconductor chips for its high performance and high logic density features. However, because of their dedicated electronic circuits, SRAMs are sensitive to radiation effects. In this article, a portable scheme combined with error correcting code (ECC) and refreshing techniques is proposed to correct errors and mitigate error accumulation in extreme radiation environments. Since the proposed scheme is small and transparent to other modules and no additional latency is introduced, it therefore can be easily applied to the system where the hardware modules are designed with fixed reading and writing latency. We evaluated this design by simulation in a hardware fault injection platform and radiation experiments in the neutron radiation facility. The results obtained in the neutron experiment, where the flux of neutron particles is 5 × 106 cm2. -1, show that the number of bit-flips in 32 kB self-refresh ECC RAM on the Xilinx Artix-7 FPGA remains zero, while the number of bit-flips in unhardened RAM rose to 32 in 1.5 h.

Error correcting codes (ECCs), Neutron radiation, SEU mitigation, Static random access memory (SRAM)
1932-8184
1436-1447
Lu, Yufan
48c01f87-f3c1-4c21-93ed-7ab5134f3076
Zhai, Xiaojun
93ee3dbb-e10e-472b-adec-78acfcd4cbc7
Saha, Sangeet
168b72f1-80f6-4847-aba8-7c5fb7fa22b0
Ehsan, Shoaib
ae8922f0-dbe0-4b22-8474-98e84d852de7
McDonald-Maier, Klaus D.
d35c2e77-744a-4318-9d9d-726459e64db9
Lu, Yufan
48c01f87-f3c1-4c21-93ed-7ab5134f3076
Zhai, Xiaojun
93ee3dbb-e10e-472b-adec-78acfcd4cbc7
Saha, Sangeet
168b72f1-80f6-4847-aba8-7c5fb7fa22b0
Ehsan, Shoaib
ae8922f0-dbe0-4b22-8474-98e84d852de7
McDonald-Maier, Klaus D.
d35c2e77-744a-4318-9d9d-726459e64db9

Lu, Yufan, Zhai, Xiaojun, Saha, Sangeet, Ehsan, Shoaib and McDonald-Maier, Klaus D. (2022) A self-adaptive SEU mitigation scheme for embedded systems in extreme radiation environments. IEEE Systems Journal, 16 (1), 1436-1447. (doi:10.1109/JSYST.2022.3144019).

Record type: Article

Abstract

When electronic systems are working in radiation environments, transient errors, and permanent errors may occur. Static random-access memory (SRAM) has been the one of most significant parts in various semiconductor chips for its high performance and high logic density features. However, because of their dedicated electronic circuits, SRAMs are sensitive to radiation effects. In this article, a portable scheme combined with error correcting code (ECC) and refreshing techniques is proposed to correct errors and mitigate error accumulation in extreme radiation environments. Since the proposed scheme is small and transparent to other modules and no additional latency is introduced, it therefore can be easily applied to the system where the hardware modules are designed with fixed reading and writing latency. We evaluated this design by simulation in a hardware fault injection platform and radiation experiments in the neutron radiation facility. The results obtained in the neutron experiment, where the flux of neutron particles is 5 × 106 cm2. -1, show that the number of bit-flips in 32 kB self-refresh ECC RAM on the Xilinx Artix-7 FPGA remains zero, while the number of bit-flips in unhardened RAM rose to 32 in 1.5 h.

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e-pub ahead of print date: 28 January 2022
Published date: 1 March 2022
Additional Information: Funding Information: This work was supported by the U.K. Engineering and Physical Sciences Research Council under Grant EP/R02572X/1, Grant EP/P017487/1, and Grant EP/V034111/1. Publisher Copyright: © 2007-2012 IEEE.
Keywords: Error correcting codes (ECCs), Neutron radiation, SEU mitigation, Static random access memory (SRAM)

Identifiers

Local EPrints ID: 473503
URI: http://eprints.soton.ac.uk/id/eprint/473503
ISSN: 1932-8184
PURE UUID: 11019ade-5c9b-4ce3-82bc-bbd2fbffbefa
ORCID for Shoaib Ehsan: ORCID iD orcid.org/0000-0001-9631-1898

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Date deposited: 20 Jan 2023 18:02
Last modified: 17 Mar 2024 04:16

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Contributors

Author: Yufan Lu
Author: Xiaojun Zhai
Author: Sangeet Saha
Author: Shoaib Ehsan ORCID iD
Author: Klaus D. McDonald-Maier

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