Blockwise parallel frozen bit generation for polar codes
Blockwise parallel frozen bit generation for polar codes
An electronic device configured to perform polar coding is described. The electronic device includes a bit pattern generator (3403) configured to successively perform a bit pattern generation process over a series (t = [n/w]) of clock cycles; and a counter (c, 4203), operably coupled to the bit pattern generator (3403) and configured to count a number of successive bit pattern generation sub-processes over the series (t = [n/w]) of clock cycles. The bit pattern generator (3403) is configured to: provide a successive sub-set of (w) bits from a bit pattern vector (bk,n) in each successive t = [n/w] clock cycle; where the bit pattern vector comprises n bits, of which 'k' bits adopt a first binary value and n-k bits adopt a complementary binary value.
CA3069482A1
Maunder, Rob
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Brejza, Matthew Felix
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Zhong, Shida
68341271-2339-4e05-b7fc-ec6cbb22c1b3
Perez Andrade, Isaac
51aa4dad-b027-4b31-8cf7-1225889be1dc
Chen, Taihai
c5107a09-2235-4adf-b71b-c1e4a3534732
Maunder, Rob, Brejza, Matthew Felix, Zhong, Shida, Perez Andrade, Isaac and Chen, Taihai
(Inventors)
(2022)
Blockwise parallel frozen bit generation for polar codes.
CA3069482A1.
Abstract
An electronic device configured to perform polar coding is described. The electronic device includes a bit pattern generator (3403) configured to successively perform a bit pattern generation process over a series (t = [n/w]) of clock cycles; and a counter (c, 4203), operably coupled to the bit pattern generator (3403) and configured to count a number of successive bit pattern generation sub-processes over the series (t = [n/w]) of clock cycles. The bit pattern generator (3403) is configured to: provide a successive sub-set of (w) bits from a bit pattern vector (bk,n) in each successive t = [n/w] clock cycle; where the bit pattern vector comprises n bits, of which 'k' bits adopt a first binary value and n-k bits adopt a complementary binary value.
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More information
Accepted/In Press date: 2022
Identifiers
Local EPrints ID: 473951
URI: http://eprints.soton.ac.uk/id/eprint/473951
PURE UUID: 02af90c4-2598-4f1a-af2f-e12a77ae86b7
Catalogue record
Date deposited: 06 Feb 2023 17:42
Last modified: 17 Mar 2024 03:14
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Contributors
Inventor:
Rob Maunder
Inventor:
Matthew Felix Brejza
Inventor:
Shida Zhong
Inventor:
Isaac Perez Andrade
Inventor:
Taihai Chen
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