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Cyclic redundancy check computation circuit, communication unit, and method therefor

Cyclic redundancy check computation circuit, communication unit, and method therefor
Cyclic redundancy check computation circuit, communication unit, and method therefor
GB201909489D0
Maunder, Rob
76099323-7d58-4732-a98f-22a662ccba6c
Brejza, Matthew Felix
a761342e-e140-45a7-ad48-095a6628af17

Maunder, Rob and Brejza, Matthew Felix (Inventors) (2021) Cyclic redundancy check computation circuit, communication unit, and method therefor. GB201909489D0.

Record type: Patent

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More information

Published date: 16 June 2021

Identifiers

Local EPrints ID: 474025
URI: http://eprints.soton.ac.uk/id/eprint/474025
PURE UUID: 7fbb67d0-1019-414e-83b3-e3f346aa89a2
ORCID for Rob Maunder: ORCID iD orcid.org/0000-0002-7944-2615

Catalogue record

Date deposited: 09 Feb 2023 17:43
Last modified: 17 Mar 2024 03:14

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Contributors

Inventor: Rob Maunder ORCID iD
Inventor: Matthew Felix Brejza

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