Circuit Transient Analysis Using State Space Equations
Circuit Transient Analysis Using State Space Equations
The method to rearrange the classic transient analysis circuit simulation algorithm is presented in this paper. The steps of transforming circuit equations into state variable equations are illustrated. Explicit fourth order Runge Kutta method written in C is selected to solve the transformed equations in order to break the time dependencies, and hence to permit parallel transient analysis. Results of implementing the new algorithm on non-linear example circuits are reported. This approach can obtain significant speedup as compared to the simulation on the same circuit using tradition method. The proposed ideas of extracting parallelism are also discussed.
Circuit simulation, Parallel Computing, SPICE
330-336
Lam, Kai Chi Alex
af57912c-fa6d-4e56-ba01-6b8c19867570
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
2013
Lam, Kai Chi Alex
af57912c-fa6d-4e56-ba01-6b8c19867570
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Lam, Kai Chi Alex and Zwolinski, Mark
(2013)
Circuit Transient Analysis Using State Space Equations.
Gaur, M.S. Gaur
(ed.)
In VLSI Design and Test - 17th International Symposium, VDAT 2013, Revised Selected Papers.
vol. 382 CCIS,
Springer.
.
(doi:10.1007/978-3-642-42024-5_39).
Record type:
Conference or Workshop Item
(Paper)
Abstract
The method to rearrange the classic transient analysis circuit simulation algorithm is presented in this paper. The steps of transforming circuit equations into state variable equations are illustrated. Explicit fourth order Runge Kutta method written in C is selected to solve the transformed equations in order to break the time dependencies, and hence to permit parallel transient analysis. Results of implementing the new algorithm on non-linear example circuits are reported. This approach can obtain significant speedup as compared to the simulation on the same circuit using tradition method. The proposed ideas of extracting parallelism are also discussed.
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More information
Published date: 2013
Venue - Dates:
17th International Symposium on VLSI Design and Test Symposium, VDAT 2013, , Jaipur, India, 2013-07-27 - 2013-07-30
Keywords:
Circuit simulation, Parallel Computing, SPICE
Identifiers
Local EPrints ID: 474535
URI: http://eprints.soton.ac.uk/id/eprint/474535
ISSN: 1865-0929
PURE UUID: d154f1cb-dab5-4f30-b625-d8cb4328d557
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Date deposited: 23 Feb 2023 18:01
Last modified: 06 Jun 2024 01:32
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Contributors
Author:
Kai Chi Alex Lam
Author:
Mark Zwolinski
Editor:
M.S. Gaur Gaur
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