Polar decoder, communication unit, integrated circuit and method therefor
Polar decoder, communication unit, integrated circuit and method therefor
A polar decoder kernel (111) is described. The polar decoder kernal (111) includes a processing unit (2201) having: at least one input configured to receive at least one input Logarithmic Likelihood Ratio, LLR, (2202, 2203); a logic circuit configured to manipulate the at least one input LLR; and at least one output configured to output the manipulated at least one LLR. The logic circuit of the processing unit (2201) includes only a single two-input adder (2207) to manipulate the at least one input LLR, and the input LLR and manipulated LLR are in a format of a fixed-point number representation that comprises a two's complement binary number and an additional sign bit.
GB2563463A
Intellectual Property Office
6 May 2020
Maunder, Rob
76099323-7d58-4732-a98f-22a662ccba6c
Brejza, Matthew Felix
a761342e-e140-45a7-ad48-095a6628af17
Zhong, Shida
68341271-2339-4e05-b7fc-ec6cbb22c1b3
Perez Andrade, Isaac
51aa4dad-b027-4b31-8cf7-1225889be1dc
Chen, Taihai
c5107a09-2235-4adf-b71b-c1e4a3534732
Maunder, Rob, Brejza, Matthew Felix, Zhong, Shida, Perez Andrade, Isaac and Chen, Taihai
(Inventors)
(2020)
Polar decoder, communication unit, integrated circuit and method therefor.
GB2563463A.
Abstract
A polar decoder kernel (111) is described. The polar decoder kernal (111) includes a processing unit (2201) having: at least one input configured to receive at least one input Logarithmic Likelihood Ratio, LLR, (2202, 2203); a logic circuit configured to manipulate the at least one input LLR; and at least one output configured to output the manipulated at least one LLR. The logic circuit of the processing unit (2201) includes only a single two-input adder (2207) to manipulate the at least one input LLR, and the input LLR and manipulated LLR are in a format of a fixed-point number representation that comprises a two's complement binary number and an additional sign bit.
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Published date: 6 May 2020
Identifiers
Local EPrints ID: 475439
URI: http://eprints.soton.ac.uk/id/eprint/475439
PURE UUID: fed7c5c8-f846-4367-bdba-ab832118fc62
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Date deposited: 17 Mar 2023 17:43
Last modified: 17 Mar 2024 03:14
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Contributors
Inventor:
Rob Maunder
Inventor:
Matthew Felix Brejza
Inventor:
Shida Zhong
Inventor:
Isaac Perez Andrade
Inventor:
Taihai Chen
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