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Mixed-mode simulation of oversampled sigma-delta A-D converters

Mixed-mode simulation of oversampled sigma-delta A-D converters
Mixed-mode simulation of oversampled sigma-delta A-D converters

The performance of conventional A-D converters is limited by the precision of the analogue components involved, and by second order effects in device characteristics. The circuit-level simulation of A-D converters requires unreasonable CPU time. Most of the computational effort is wasted by the need to model the entire circuit at the device level, including logic devices. The simulation of oversampled sigma-delta converters presents further problems. As their performance is quantified by the signal to noise ratio at the output, large amounts of time point data are needed. Until now, it has therefore only been possible to simulate sigma- delta converters by means of a completely functional description. The circuit-level non-idealities must be modelled in this description. It would be better to simulate the analogue parts of the circuit at a circuit-level, leaving the digital parts to be simulated rapidly at the logic-level. This paper describes how a mixed-mode simulator has been used to analyse the behaviour of a switched capacitor sigma-delta converter.

0963-3308
7/1-7/3
Brown, A. D.
5c19e523-65ec-499b-9e7c-91522017d7e0
Zwolinski, M.
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Redman-White, W.
d5376167-c925-460f-8e9c-13bffda8e0bf
Brown, A. D.
5c19e523-65ec-499b-9e7c-91522017d7e0
Zwolinski, M.
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Redman-White, W.
d5376167-c925-460f-8e9c-13bffda8e0bf

Brown, A. D., Zwolinski, M. and Redman-White, W. (1990) Mixed-mode simulation of oversampled sigma-delta A-D converters. In IEE Colloquium. 7/1-7/3 .

Record type: Conference or Workshop Item (Paper)

Abstract

The performance of conventional A-D converters is limited by the precision of the analogue components involved, and by second order effects in device characteristics. The circuit-level simulation of A-D converters requires unreasonable CPU time. Most of the computational effort is wasted by the need to model the entire circuit at the device level, including logic devices. The simulation of oversampled sigma-delta converters presents further problems. As their performance is quantified by the signal to noise ratio at the output, large amounts of time point data are needed. Until now, it has therefore only been possible to simulate sigma- delta converters by means of a completely functional description. The circuit-level non-idealities must be modelled in this description. It would be better to simulate the analogue parts of the circuit at a circuit-level, leaving the digital parts to be simulated rapidly at the logic-level. This paper describes how a mixed-mode simulator has been used to analyse the behaviour of a switched capacitor sigma-delta converter.

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More information

Published date: 1990
Venue - Dates: Colloquium on Analogue VLSI, , London, Engl, 1990-05-10 - 1990-05-10

Identifiers

Local EPrints ID: 475574
URI: http://eprints.soton.ac.uk/id/eprint/475574
ISSN: 0963-3308
PURE UUID: 0ad5a573-c1a2-41c8-9553-23d829b307cd
ORCID for M. Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 21 Mar 2023 17:51
Last modified: 22 Mar 2023 02:34

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Contributors

Author: A. D. Brown
Author: M. Zwolinski ORCID iD
Author: W. Redman-White

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