Metal oxide thin-film transistors for heterogeneous integration applications

Abstract

Heterogeneous integration is the most promising technological advancement for tackling the end of Moore's law, the empirical rule that transistor density doubles every 18 months. Moore's law has governed the progress of the semiconductor industry for the past six decades. As semiconductor manufacturers reach the physical limits of silicon hardware performance, the search is on for future-proof techniques to fuel the continued growth of hardware processing power. For many researchers in academia and industry, a critical approach to extending the expiry date on Moore's law is heterogeneous integration - the concept of integrating diverse semiconductor materials on-chip, each targeted at a specialised application. A novel transistor design is needed to bridge these diverse heterogeneous subsystems. This platform might buck or boost signals from one function to the other, perform a logical operation between active device layers, or directly control components within a subsection of the chip. Such a transistor technology must perform well under a range of operating conditions, with low susceptibility to noise, stability under extreme bias stresses, and, most critically, use fabrication techniques that do not impact the various heterogeneous components. Existing semiconductor technologies using Si, Ge or GaAs perform excellently due to decades of incredible research but have a fundamental flaw in this context. These materials require high-temperature annealing and oxidation steps to fabricate working transistors; coupled with high-energy ion implantation and plasma etching steps, Si, Ge, and GaAs transistors are unsuitable for this novel heterogeneous integration transistor application. These fabrication techniques destroy any existing circuitry present on-chip. Therefore, a high-quality, high-performance semiconductor material, which is amenable to low-temperature, low-impact microfabrication techniques, is needed for these applications in heterogeneous integration. Metal-oxide semiconductors represent a wide range of amorphous, poly-crystalline and crystalline materials that are finding applications in novel electronic hardware. With existing applications such as transparent conducting oxides, solar cells, photodetectors, back-plane power management and driving LED screens, metal-oxide semiconductors are becoming increasingly ubiquitous in the semiconductor world. High-quality metal-oxide thin-films can be deposited at temperatures below 200°C and can be patterned by low-damage etching techniques. At the same time, metal-oxide transistors exhibit attractive electronic properties, including high carrier mobility, wide bandgap, and performance stability. This combination of properties makes metal-oxide semiconductors ideal candidate materials for heterogeneous integration circuitry of the future. To this end, this thesis aims to develop thin-film transistor (TFT) electronic hardware using low-temperature ZnO semiconductor, Al-doped ZnO transparent conductor, and Al2O3 insulator material. The materials, design, and performance of ZnO-TFTs are improved and optimised using the procedures presented in this work. The result is a comprehensive investigation into the design factors driving high-performance ZnO-TFT operation and their impact on the electrical figures of merit used to benchmark transistor devices, including investigations towards optimising ZnO channel thickness, Al2O3 dielectric thickness, AZO contact doping, wet-etching techniques, dual-gate versus single-gate configuration, and source-drain contact overlap. The fabricated ZnO-TFTs with optimised designs demonstrate carrier mobility over 80 cm^2/(Vs), on/off current ratio over 10^9, sub-threshold swing below 110 mV/dec, and stable negative threshold voltage with hysteresis below 150 mV. State-of-the-art performance is measured across one billion on/off cycles with the ZnO-TFT subjected to incredibly high electrical bias stresses. Scaling gate length is beneficial for radio frequency switching for the ZnO-TFT, with a cut-off frequency above 200 MHz. However, such scaling is also detrimental to DC applications demonstrating the need for careful design of these heterogeneous integration systems. Carrier mobility in single-gate TFTs is shown to be dominated by Coulomb scattering at the dielectric interface, which can be mitigated by dual-gate TFTs. This thesis is culminated firstly by the integration of ZnO-TFTs into working logical inverters and secondly by the first integration of ZnO-TFT with a silicon carbide resistive memory device into a one-transistor-one-resistor memory cell. These demonstrations show the incredible potential of stacked heterogeneous integration systems towards realising the electronic hardware of the future needed to continue Moore's Law into the 21st Century. The research output detailed in this thesis has been presented as two posters and four presentations at international conferences. One journal paper is under review and three are in preparation.

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Identifiers

ORCID for Ben Daniel Rowlinson: orcid.org/0000-0002-7533-0579

ORCID for Harold Chong: orcid.org/0000-0002-7110-5761

ORCID for Xu Fang: orcid.org/0000-0003-1735-2654

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