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An adaptive neural spike processor with embedded active learning for improved unsupervised sorting accuracy

An adaptive neural spike processor with embedded active learning for improved unsupervised sorting accuracy
An adaptive neural spike processor with embedded active learning for improved unsupervised sorting accuracy

There is a need for integrated spike sorting processors in implantable devices with low power consumption that have improved accuracy. Learning the characteristics of the variable input neural signals and adapting the functionality of the sorting process can improve the accuracy. An adaptive spike sorting processor is presented accounting for the variation in the input signal noise characteristics and the variable difficulty in the selection of the spike characteristics, which significantly improves the accuracy. The adaptive spike processor was fabricated in 180-nm CMOS technology for proof of concept. It performs conditional detection, alignment, adaptive feature extraction, and online clustering with sorting threshold self-tuning capability. The chip was tested under different input signal conditions to demonstrate its adaptation capability providing a median classification accuracy of 84.5% and consuming 148 μW from a 1.8 V supply voltage.

Adaptive decomposition, brain machine interface, feature extraction, processor, reconfigurable embedded frames, signal model learning, spike sorting, unsupervised clustering
1932-4545
665-676
Zamani, Majid
431788cc-0702-4fa9-9709-f5777a2d0d25
Jiang, Dai
782f1637-d100-43dd-821f-6e4e156a50db
Demosthenous, Andreas
bed19531-d770-4f48-8464-59d225ddea8d
Zamani, Majid
431788cc-0702-4fa9-9709-f5777a2d0d25
Jiang, Dai
782f1637-d100-43dd-821f-6e4e156a50db
Demosthenous, Andreas
bed19531-d770-4f48-8464-59d225ddea8d

Zamani, Majid, Jiang, Dai and Demosthenous, Andreas (2018) An adaptive neural spike processor with embedded active learning for improved unsupervised sorting accuracy. IEEE Transactions on Biomedical Circuits and Systems, 12 (3), 665-676. (doi:10.1109/TBCAS.2018.2825421).

Record type: Article

Abstract

There is a need for integrated spike sorting processors in implantable devices with low power consumption that have improved accuracy. Learning the characteristics of the variable input neural signals and adapting the functionality of the sorting process can improve the accuracy. An adaptive spike sorting processor is presented accounting for the variation in the input signal noise characteristics and the variable difficulty in the selection of the spike characteristics, which significantly improves the accuracy. The adaptive spike processor was fabricated in 180-nm CMOS technology for proof of concept. It performs conditional detection, alignment, adaptive feature extraction, and online clustering with sorting threshold self-tuning capability. The chip was tested under different input signal conditions to demonstrate its adaptation capability providing a median classification accuracy of 84.5% and consuming 148 μW from a 1.8 V supply voltage.

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More information

e-pub ahead of print date: 17 May 2018
Additional Information: Publisher Copyright: © 2007-2012 IEEE.
Keywords: Adaptive decomposition, brain machine interface, feature extraction, processor, reconfigurable embedded frames, signal model learning, spike sorting, unsupervised clustering

Identifiers

Local EPrints ID: 489257
URI: http://eprints.soton.ac.uk/id/eprint/489257
ISSN: 1932-4545
PURE UUID: 4ff080fd-17c3-4407-a129-144a6bd521ff
ORCID for Majid Zamani: ORCID iD orcid.org/0009-0007-0844-473X

Catalogue record

Date deposited: 18 Apr 2024 16:48
Last modified: 19 Apr 2024 02:06

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Contributors

Author: Majid Zamani ORCID iD
Author: Dai Jiang
Author: Andreas Demosthenous

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