Wafer bonding for processing small wafers in large wafer facilities

Abstract

Manufacturing semiconductor technologies in production facilities typically involves performing hundreds to thousands of steps in pipelines that can include hundreds of fabrication tools. However, semiconductor wafers can vary widely in size and cost depending on their constituent materials and desired applications. Hence, equipping all fabrication tools within a facility with capabilities for processing wafers of any dimension and material can impose high establishment and operation costs. In this work, we developed a method to process wafers of arbitrary sizes and materials within fabrication facilities that are designated for large wafers, while minimizing tool contamination from processing these wafers. We have shown that we can use an 8-in designated facility to fabricate integrated photonic waveguides and grating structures on smaller device wafers. This was achieved by etching a recess on the 8-in Si carrier wafer and developing a bonding technique to use the recess as a slot, in which the device wafer is bonded and exposed. The fabricated photonic devices were tested to confirm the suitability of our bonding method in lithography and etching processes. Beneficiaries of this work can widely vary between university researchers and industrial engineers who operate or manage cleanroom fabrication tools.

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Identifiers

ORCID for Yasir J. Noori: orcid.org/0000-0001-5285-8779

ORCID for Ilias Skandalos: orcid.org/0000-0002-9021-1420

ORCID for Frederic Gardes: orcid.org/0000-0003-1400-3272

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