Dataset supporting the publication "Efficient Deployment of Early-Exit DNN Architectures on FPGA Platforms"

Abstract

Dataset supporting publication "Efficient Deployment of Early-Exit DNN Architectures on FPGA Platforms" presented at the conference: Design, Automation & Test in Europe Conference. This dataset contains:  'Fig2a.csv': Data supporting Fig. 2 (a). Execution time in ms of the Dynamic Deep Neural Network on different platforms. (CPU, CPU+GPU, Jetson Xavier and FPGA Xilinx ZCU106)  'Fig2b.csv': Data supporting Fig. 2 (b). Energy consumption and needed power for the execution of the Dynamic Deep Neural network on different platforms. (CPU, CPU+GPU, Jetson Xavier and FPGA Xilinx ZCU106). 'Fig3.csv' : Data supporting Fig. 3 . Number of samples to be firstly correctly predicted after the execution of every layer on ResNet-32. Related projects: Engineering and Physical Sciences Research Council (EPSRC) under EP/S030069/1 Licence: CC BY 4.0

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