Surface morphology engineering of metal oxide-transition metal dichalcogenide heterojunction
Surface morphology engineering of metal oxide-transition metal dichalcogenide heterojunction
A tremendous effort has been made to develop 2D materials-based FETs for electronic applications due to their atomically thin structures. Typically, the electrical performance of the device can vary with the surface roughness and thickness of the channel layer. Therefore, a two-step surface engineering process is demonstrated to tailor the surface roughness and thickness of MoSe2 multilayers involving exposure of O2 plasma followed by dipping in (NH4)2S(aq) solution. The O2 plasma treatment generated an amorphous MoOx layer to form a MoOx/MoSe2 heterojunction, and the (NH4)2S(aq) treatment tailored the surface roughness of the heterojunction. The ON/OFF current ratio of MoSe2 FET is about 1.1 × 105 and 5.7 × 104 for bare and chemically etched MoSe2, respectively. The surface roughness of the chemically treated MoSe2 is higher than that of the bare, 4.2 ± 0.5 nm against 3.6 ± 0.5 nm. Conversely, a 1-hour exposure of the multilayer MoOx/MoSe2 heterostructure with the (NH4)2S(aq) solution removed the amorphous oxide layer and scaled down the thickness of MoSe2 from ~92.2 nm to ~38.9 nm. The preliminary study shows that this simple two-step strategy can obtain a higher surface-area-to-volume ratio and thickness engineering with acceptable variation in electrical properties.
722-730
Babu, Roshni
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Oh, Chang-Hwan
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Kim, Seung-Il
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Lee, Dong-Park
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Sim, Gyuhyeon
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Lee, Do-Hyeon
c596b6e4-77d4-47ac-b077-ec8ce4b937f1
Je, Yeonjin
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Hwi, Kim Chan
63c8e853-8d24-4038-8f38-98aed5c5ea15
Jeong, Woo Jin
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Ryu, Gyeong Hee
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Kim, Jun Young
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Nam, Sang Yong
cbfc9381-9cdb-4393-b946-812d7d04027c
Lee, Jae Hyun
e5fc2008-dcf2-4945-bd10-8ff0ef1ae928
Park, Jun Hong
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2 October 2022
Babu, Roshni
fe7dbe92-1f6b-44e7-94de-4321ff68284a
Oh, Chang-Hwan
df4ea531-36c3-458a-8c58-de78c6626dc5
Kim, Seung-Il
d9401032-3e75-4309-9623-8cf5e6ad28c2
Lee, Dong-Park
af0cc540-9630-4353-812d-afeca94dc641
Sim, Gyuhyeon
d50c8289-7f1b-4840-a9f0-dbfc74712380
Lee, Do-Hyeon
c596b6e4-77d4-47ac-b077-ec8ce4b937f1
Je, Yeonjin
547c163b-f5c4-4a2d-941b-d2cdb872ee91
Hwi, Kim Chan
63c8e853-8d24-4038-8f38-98aed5c5ea15
Jeong, Woo Jin
7796183f-7975-46c3-8f9f-587283af163c
Ryu, Gyeong Hee
8a309d90-20ae-4863-b105-2e328323ef18
Kim, Jun Young
9fd9c9fe-ed47-485f-ac0a-623f6616eae9
Nam, Sang Yong
cbfc9381-9cdb-4393-b946-812d7d04027c
Lee, Jae Hyun
e5fc2008-dcf2-4945-bd10-8ff0ef1ae928
Park, Jun Hong
79e8b843-04b4-40b5-acbf-ae9337540c55
Babu, Roshni, Oh, Chang-Hwan, Kim, Seung-Il, Lee, Dong-Park, Sim, Gyuhyeon, Lee, Do-Hyeon, Je, Yeonjin, Hwi, Kim Chan, Jeong, Woo Jin, Ryu, Gyeong Hee, Kim, Jun Young, Nam, Sang Yong, Lee, Jae Hyun and Park, Jun Hong
(2022)
Surface morphology engineering of metal oxide-transition metal dichalcogenide heterojunction.
Journal of Asian Ceramic Societies, 10 (4), .
(doi:10.1080/21870764.2022.2117892).
Abstract
A tremendous effort has been made to develop 2D materials-based FETs for electronic applications due to their atomically thin structures. Typically, the electrical performance of the device can vary with the surface roughness and thickness of the channel layer. Therefore, a two-step surface engineering process is demonstrated to tailor the surface roughness and thickness of MoSe2 multilayers involving exposure of O2 plasma followed by dipping in (NH4)2S(aq) solution. The O2 plasma treatment generated an amorphous MoOx layer to form a MoOx/MoSe2 heterojunction, and the (NH4)2S(aq) treatment tailored the surface roughness of the heterojunction. The ON/OFF current ratio of MoSe2 FET is about 1.1 × 105 and 5.7 × 104 for bare and chemically etched MoSe2, respectively. The surface roughness of the chemically treated MoSe2 is higher than that of the bare, 4.2 ± 0.5 nm against 3.6 ± 0.5 nm. Conversely, a 1-hour exposure of the multilayer MoOx/MoSe2 heterostructure with the (NH4)2S(aq) solution removed the amorphous oxide layer and scaled down the thickness of MoSe2 from ~92.2 nm to ~38.9 nm. The preliminary study shows that this simple two-step strategy can obtain a higher surface-area-to-volume ratio and thickness engineering with acceptable variation in electrical properties.
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Published date: 2 October 2022
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Local EPrints ID: 505726
URI: http://eprints.soton.ac.uk/id/eprint/505726
PURE UUID: fdde7b50-933c-480d-9c23-e4e0387afbc9
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Date deposited: 16 Oct 2025 17:28
Last modified: 16 Oct 2025 17:28
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Author:
Roshni Babu
Author:
Chang-Hwan Oh
Author:
Seung-Il Kim
Author:
Dong-Park Lee
Author:
Gyuhyeon Sim
Author:
Do-Hyeon Lee
Author:
Yeonjin Je
Author:
Kim Chan Hwi
Author:
Woo Jin Jeong
Author:
Gyeong Hee Ryu
Author:
Jun Young Kim
Author:
Sang Yong Nam
Author:
Jae Hyun Lee
Author:
Jun Hong Park
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