READ ME File For 'TestDataset for Low-Temperature Al2O3/ZnO Thin-Film Transistors for 3D Heterogeneous Integration: Interface Engineering, Bias Stress Instability, and Reliability Mechanisms'

Dataset DOI: 10.5258/SOTON/D3906

ReadMe Author: Jiale Zeng, University of Southampton, ORCID ID: 0000-0001-8828-675X

This dataset supports the thesis entitled 
AWARDED BY: University of Southampton
DATE OF AWARD: [2026]


Date of data collection: [2024-2025]

Information about geographic location of data collection: University of Southampton, United Kingdom

Licence:
[Creative Commons Attribution (CC-BY 4.0)]

Related projects/Funders:
[No external funding]



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DATA & FILE OVERVIEW
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This dataset contains:
Electrical and material characterization data for ZnO thin-film transistors (TFTs) with Al2O3 gate dielectrics deposited at different temperatures (150°C–300°C).
/IV_Data/
    Transfer characteristics (Id–Vg) at different temperatures and channel widths
/Extracted_Parameters/
    Extracted parameters including threshold voltage (Vth), subthreshold swing (SS), mobility, on/off ratio, interface trap density (Dit)

Each CSV file contains raw or processed measurement data. File names indicate temperature, channel width, and measurement type.



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METHODOLOGICAL INFORMATION
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Devices:
ZnO thin-film transistors with Al2O3 gate dielectric deposited using atomic layer deposition (ALD) at temperatures ranging from 150°C to 300°C.

Measurement methods:
- I–V measurements using semiconductor parameter analyzer
Data processing:
- Threshold voltage (Vth) extracted using linear extrapolation method
- Subthreshold swing (SS) calculated from log(Id)–Vg slope
- Interface trap density (Dit) extracted using the :contentReference[oaicite:0]{index=0} based on high-frequency C–V data
- Hysteresis (ΔV) calculated as the difference between forward and reverse sweep voltages at constant capacitance

Software:
- MATLAB (App Designer-based custom analysis tools)
- OriginLab for plotting and fitting

Experimental conditions:
- Temperature: 150°C, 200°C, 250°C, 300°C
- Bias stress conditions: Positive Bias Stress (PBS) and Negative Bias Stress (NBS), under dark and illuminated conditions (365 nm UV)

Quality assurance:
- Multiple device measurements across wafer regions (Left, Right, Center, Top, Bottom)
- Outlier removal and consistency checks applied during parameter extraction

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DATA-SPECIFIC INFORMATION <Create sections for each datafile or set, as appropriate>
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Variables include:

Vg (V): Gate voltage  
Vd (V): Drain voltage  
Id (A): Drain current  
Dit (cm⁻²·eV⁻¹): Interface trap density  
SS (V/dec): Subthreshold swing  
Vth (V): Threshold voltage  

Missing data:
- Empty fields indicate unavailable or non-measured data

File format:
- CSV files with column headers included

Date of file creation:
2024–2025