Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems
Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems
In this paper, we present an efficient two-step iterative synthesis approach for distributed embedded systems containing dynamic voltage scalable processing elements (DVS-PEs), based on genetic algorithms. The approach partitions, schedules, and voltage scales multi-rate specifications given as task graphs with multiple deadlines. A distinguishing feature of the proposed synthesis is the utilisation of a generalised DVS method. In contrast to previous techniques, which "simply" exploit available slack time, this generalised technique additionally considers the PE power profile during a refined voltage selection to further increase the energy savings. Extensive experiments are conducted to demonstrate the efficiency of the proposed approach. We report up to 43.2% higher energy reductions compared to previous DVS scheduling approaches based on constructive techniques and total energy savings of up to 82.9% for mapping and scheduling optimised DVS systems.
514-521
Schmitz, Marcus T.
76acfda5-3d49-47a0-a38b-a73273f2ba21
Al-Hashimi, Bashir M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Eles, Petru
ff663918-4c91-4774-a196-06d87393323f
March 2002
Schmitz, Marcus T.
76acfda5-3d49-47a0-a38b-a73273f2ba21
Al-Hashimi, Bashir M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Eles, Petru
ff663918-4c91-4774-a196-06d87393323f
Schmitz, Marcus T., Al-Hashimi, Bashir M. and Eles, Petru
(2002)
Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems.
Design, Automation and Test Europe Conference (DATE2002), Paris, France.
.
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Abstract
In this paper, we present an efficient two-step iterative synthesis approach for distributed embedded systems containing dynamic voltage scalable processing elements (DVS-PEs), based on genetic algorithms. The approach partitions, schedules, and voltage scales multi-rate specifications given as task graphs with multiple deadlines. A distinguishing feature of the proposed synthesis is the utilisation of a generalised DVS method. In contrast to previous techniques, which "simply" exploit available slack time, this generalised technique additionally considers the PE power profile during a refined voltage selection to further increase the energy savings. Extensive experiments are conducted to demonstrate the efficiency of the proposed approach. We report up to 43.2% higher energy reductions compared to previous DVS scheduling approaches based on constructive techniques and total energy savings of up to 82.9% for mapping and scheduling optimised DVS systems.
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Published date: March 2002
Additional Information:
Event Dates: March 2002
Venue - Dates:
Design, Automation and Test Europe Conference (DATE2002), Paris, France, 2002-03-01
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 256142
URI: http://eprints.soton.ac.uk/id/eprint/256142
PURE UUID: dcd9777e-7a8f-43e7-b6ea-fe309c6fae8e
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Date deposited: 21 Nov 2001
Last modified: 17 Mar 2024 02:42
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Contributors
Author:
Marcus T. Schmitz
Author:
Bashir M. Al-Hashimi
Author:
Petru Eles
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