A 50nm channel vertical MOSFET concept incorporating a retrograde channel and a dielectric pocket

Lamb, A. C., Riley, L. S., Hall, S., Kunz, V.D., Groot, C. H. de and Ashburn, P. (2001) A 50nm channel vertical MOSFET concept incorporating a retrograde channel and a dielectric pocket. ESSDERC 2001 Frontier Group, 347-350.

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Description/Abstract

A novel architecture for a vertical MOSFET is proposed and initial investigations conducted by numerical simulation.

Item Type:	Conference or Workshop Item (UNSPECIFIED)
Additional Information:	Address: Not Known
Divisions:	Faculty of Physical and Applied Science > Electronics and Computer Science > NANO
Item ID:	256162
Date Deposited:	07 Jul 2003
Last Modified:	02 Mar 2012 12:19
Contributors:	Lamb, A. C. (Author) Riley, L. S. (Author) Hall, S. (Author) Kunz, V.D. (Author) Groot, C. H. de (Author) Ashburn, P. (Author)
Date:	September 2001
Additional Information:	Address: Not Known
Status:	Published
Publisher:	Frontier Group
Further Information:	Google Scholar
URI:	http://eprints.soton.ac.uk/id/eprint/256162

URI:
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