A lock-step synchronization algorithm for logic simulation in a multi-solver environment


Kazmierski, T. J., Wang, X. and Mrcarica, Z. (1994) A lock-step synchronization algorithm for logic simulation in a multi-solver environment. Proc. ASIC'94 Conf., Bejing

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Item Type: Conference or Workshop Item (UNSPECIFIED)
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science > EEE
ePrint ID: 256525
Date Deposited: 25 Apr 2002
Last Modified: 12 May 2014 12:15
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/256525

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