The Design of a Hierarchical Circuit-Level Simulator
(1984) The Design of a Hierarchical Circuit-Level Simulator. Electronic Design Automation, Warwick, IEE.
Download
![[img]](http://eprints.soton.ac.uk/style/images/fileicons/application_pdf.png) |
PDF
Download (4054Kb) |
| Item Type: | Conference or Workshop Item (UNSPECIFIED) |
|---|---|
| Additional Information: | Event Dates: March 1984 |
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > EEE |
| Item ID: | 257684 |
| Date Deposited: | 17 Jun 2003 |
| Last Modified: | 02 Mar 2012 13:41 |
| Contributors: | Zwolinski, M (Editor) Nichols, KG (Editor) |
| Date: | 1984 |
| Additional Information: | Event Dates: March 1984 |
| Status: | Published |
| Publisher: | IEE |
| Further Information: | Google Scholar |
| URI: | http://eprints.soton.ac.uk/id/eprint/257684 |
Actions (login required)
 |
View Item |
