The Design of a Hierarchical Circuit-Level Simulator

(1984) The Design of a Hierarchical Circuit-Level Simulator. Zwolinski, M and Nichols, KG (eds.) Electronic Design Automation, Warwick.

Record type: Conference or Workshop Item (Other)

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Published date: 1984

Additional Information: Event Dates: March 1984

Venue - Dates: Electronic Design Automation, Warwick, 1984-03-01

Organisations: EEE

Local EPrints ID: 257684

URI: http://eprints.soton.ac.uk/id/eprint/257684

PURE UUID: 5dcf5b5e-8cb0-44b3-843e-c862b4fb1b2e

ORCID for M Zwolinski:

orcid.org/0000-0002-2230-625X

Date deposited: 17 Jun 2003

Last modified: 15 Mar 2024 02:39

Editor: M Zwolinski

Editor: KG Nichols

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