The Design of a Hierarchical Circuit-Level Simulator


(1984) The Design of a Hierarchical Circuit-Level Simulator. Electronic Design Automation, Warwick, IEE.

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Item Type: Conference or Workshop Item (UNSPECIFIED)
Additional Information: Event Dates: March 1984
Divisions: Faculty of Physical Sciences and Engineering > Electronics and Computer Science > EEE
ePrint ID: 257684
Date Deposited: 17 Jun 2003
Last Modified: 27 Mar 2014 19:59
Publisher: IEE
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/257684

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