Synthesis of switched-current Ladder Derived Group delay Equalizers
Synthesis of switched-current Ladder Derived Group delay Equalizers
This paper describes the design of switched-current group delay equalizers. The design process is based on the pole-zero mirroring technique; with equalizer z-transfer functions generated using an optimization algorithm. To facilitate the systematic implementation of the equalizers, a model describing the design process is developed. A novel feature of the equalizers implementation is that wave structures are employed in realizing the equalizer poles instead of integrators. MATLAB and SI simulation results based on a 6th-order equalizer are included. The results demonstrate that the equalizer can reduce the delay of a 5th-order, 1MHz lowpass SI elliptic filter from 155ns to <20ns over the entire filter bandwidth.
1/1- 6/1
Xie, Yan
7fbf8184-0689-4cd3-a70b-5899bfd8c2e0
Al Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
2002
Xie, Yan
7fbf8184-0689-4cd3-a70b-5899bfd8c2e0
Al Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Xie, Yan and Al Hashimi, Bashir
(2002)
Synthesis of switched-current Ladder Derived Group delay Equalizers.
Proc. IEE Analog Signal Processing Symposium, Oxford, United Kingdom.
.
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Conference or Workshop Item
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Abstract
This paper describes the design of switched-current group delay equalizers. The design process is based on the pole-zero mirroring technique; with equalizer z-transfer functions generated using an optimization algorithm. To facilitate the systematic implementation of the equalizers, a model describing the design process is developed. A novel feature of the equalizers implementation is that wave structures are employed in realizing the equalizer poles instead of integrators. MATLAB and SI simulation results based on a 6th-order equalizer are included. The results demonstrate that the equalizer can reduce the delay of a 5th-order, 1MHz lowpass SI elliptic filter from 155ns to <20ns over the entire filter bandwidth.
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Published date: 2002
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Event Dates: 1 November 2002
Venue - Dates:
Proc. IEE Analog Signal Processing Symposium, Oxford, United Kingdom, 2002-11-01
Organisations:
Electronic & Software Systems
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Local EPrints ID: 258722
URI: http://eprints.soton.ac.uk/id/eprint/258722
PURE UUID: 24676a8e-ee54-4461-a299-1645fe3c42d1
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Date deposited: 05 Jan 2004
Last modified: 14 Mar 2024 06:12
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Contributors
Author:
Yan Xie
Author:
Bashir Al Hashimi
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