Design of New Logic Architectures Utilizing Optimized Suspended-Gate Single-Electron Transistors
Pruvost, B, Uchida, K, Mizuta, Hiroshi and Oda, S (2009) Design of New Logic Architectures Utilizing Optimized Suspended-Gate Single-Electron Transistors. IEEE Transactions on Nanotechnology
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| Item Type: | Article |
|---|---|
| Divisions: | Faculty of Physical and Applied Science > Electronics and Computer Science > NANO |
| Item ID: | 267766 |
| Date Deposited: | 10 Aug 2009 11:52 |
| Last Modified: | 23 Aug 2012 03:50 |
| Contributors: | Pruvost, B (Author) Uchida, K (Author) Mizuta, Hiroshi (Author) Oda, S (Author) |
| Date: | 2009 |
| Status: | Published |
| Further Information: | Google Scholar |
| ISI Citation Count: | 0 |
| URI: | http://eprints.soton.ac.uk/id/eprint/267766 |
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