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Multi-Threaded Circuit Simulation using OpenMP

Multi-Threaded Circuit Simulation using OpenMP
Multi-Threaded Circuit Simulation using OpenMP
Circuit-level simulation is a computationally intensive problem that has proven to be particularly difficult to parallelize. While device evaluation can be performed in parallel in conventional circuit simulators, the execution overhead is high. We show that, by partitioning a circuit, OpenMP can be used to solve sub-circuits in different threads, without compromising accuracy. It is shown that execution time can be reduced proportionally to the number of threads.
Zwolinski, Mark
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Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0

Zwolinski, Mark (2010) Multi-Threaded Circuit Simulation using OpenMP. LASCAS 2010: IEEE Latin American Symposium on Circuits and Systems, Brasil. 24 - 26 Feb 2010.

Record type: Conference or Workshop Item (Paper)

Abstract

Circuit-level simulation is a computationally intensive problem that has proven to be particularly difficult to parallelize. While device evaluation can be performed in parallel in conventional circuit simulators, the execution overhead is high. We show that, by partitioning a circuit, OpenMP can be used to solve sub-circuits in different threads, without compromising accuracy. It is shown that execution time can be reduced proportionally to the number of threads.

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More information

Published date: February 2010
Additional Information: Event Dates: 24-26 February 2010
Venue - Dates: LASCAS 2010: IEEE Latin American Symposium on Circuits and Systems, Brasil, 2010-02-24 - 2010-02-26
Organisations: EEE

Identifiers

Local EPrints ID: 270880
URI: http://eprints.soton.ac.uk/id/eprint/270880
PURE UUID: 8fb83e5f-8409-4992-832a-74cb928c38da
ORCID for Mark Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 21 Apr 2010 09:43
Last modified: 15 Mar 2024 02:39

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Contributors

Author: Mark Zwolinski ORCID iD

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