Verifying concurrent programs by memory unwinding
Verifying concurrent programs by memory unwinding
  We describe a new sequentialization-based approach to the symbolic verification of multi-threaded programs with shared memory and dynamic thread creation. Its main novelty is the idea of memory unwinding, i.e., an explicit representation of the sequence of write operations into the shared memory. For the verification, we nondeterministically guess this unwinding and then simulate the behavior of the program according to any scheduling that respects this guess. This approach is complementary to other sequentializations and explores an orthogonal dimension, i.e., the number of write operations. It also simplifies the implementation of several important optimizations, in particular the targeted exposure of individual writes. We implemented this approach as code-to-code transformation from multi-threaded into nondeterministic sequential programs, which allows the reuse of sequential verification tools. Experiments show that our approach is very promising: it found all errors in the concurrency category of SV-COMP15.
  
    
      Tomasco, Ermenegildo
      
        7b944585-0193-4dab-861b-8d5cdccf82cd
      
     
  
    
      Inverso, Omar
      
        1a7b5398-791c-479b-88c9-2442212d0a28
      
     
  
    
      Fischer, Bernd
      
        0c9575e6-d099-47f1-b3a2-2dbc93c53d18
      
     
  
    
      La Torre, Salvatore
      
        ec51ffc2-65d9-414e-9dd2-f5f342979c10
      
     
  
    
      Parlato, Gennaro
      
        c28428a0-d3f3-4551-a4b5-b79e410f4923
      
     
  
  
   
  
  
    
      April 2015
    
    
  
  
    
      Tomasco, Ermenegildo
      
        7b944585-0193-4dab-861b-8d5cdccf82cd
      
     
  
    
      Inverso, Omar
      
        1a7b5398-791c-479b-88c9-2442212d0a28
      
     
  
    
      Fischer, Bernd
      
        0c9575e6-d099-47f1-b3a2-2dbc93c53d18
      
     
  
    
      La Torre, Salvatore
      
        ec51ffc2-65d9-414e-9dd2-f5f342979c10
      
     
  
    
      Parlato, Gennaro
      
        c28428a0-d3f3-4551-a4b5-b79e410f4923
      
     
  
       
    
 
  
    
      
  
  
  
  
    Tomasco, Ermenegildo, Inverso, Omar, Fischer, Bernd, La Torre, Salvatore and Parlato, Gennaro
  
  
  
  
   
    (2015)
  
  
    
    Verifying concurrent programs by memory unwinding.
  
  
  
  
    
    
    
      
        
   
  
    21st International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), London, United Kingdom.
   
        
        
        11 - 15  Apr 2015.
      
    
  
  
  
      
          
           15 pp
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      Record type:
      Conference or Workshop Item
      (Paper)
      
      
    
   
    
    
      
        
          Abstract
          We describe a new sequentialization-based approach to the symbolic verification of multi-threaded programs with shared memory and dynamic thread creation. Its main novelty is the idea of memory unwinding, i.e., an explicit representation of the sequence of write operations into the shared memory. For the verification, we nondeterministically guess this unwinding and then simulate the behavior of the program according to any scheduling that respects this guess. This approach is complementary to other sequentializations and explores an orthogonal dimension, i.e., the number of write operations. It also simplifies the implementation of several important optimizations, in particular the targeted exposure of individual writes. We implemented this approach as code-to-code transformation from multi-threaded into nondeterministic sequential programs, which allows the reuse of sequential verification tools. Experiments show that our approach is very promising: it found all errors in the concurrency category of SV-COMP15.
         
      
      
        
          
            
  
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      Published date: April 2015
 
    
  
  
    
  
    
  
    
     
        Venue - Dates:
        21st International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), London, United Kingdom, 2015-04-11 - 2015-04-15
      
    
  
    
  
    
  
    
  
    
     
        Organisations:
        Electronic & Software Systems
      
    
  
    
  
  
        Identifiers
        Local EPrints ID: 370322
        URI: http://eprints.soton.ac.uk/id/eprint/370322
        
        
        
        
          PURE UUID: 4c9cd012-4499-4664-9809-1f729a52cecc
        
  
    
        
          
            
          
        
    
        
          
        
    
        
          
            
          
        
    
        
          
        
    
        
          
            
          
        
    
  
  Catalogue record
  Date deposited: 21 Oct 2014 21:54
  Last modified: 14 Mar 2024 18:15
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      Contributors
      
          
          Author:
          
            
              
              
                Ermenegildo Tomasco
              
              
            
            
          
        
      
          
          Author:
          
            
            
              Omar Inverso
            
          
        
      
          
          Author:
          
            
              
              
                Bernd Fischer
              
              
            
            
          
        
      
          
          Author:
          
            
            
              Salvatore La Torre
            
          
        
      
          
          Author:
          
            
              
              
                Gennaro Parlato
              
              
            
            
          
        
      
      
      
    
  
   
  
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