Novel countermeasures and techniques for differential power analysis

Abstract

Research in the last few years has indicated that, despite modern algorithms being secure against all published mathematical attacks and being far too complex to break by brute force, secret key data can be gathered by monitoring the power consumption. This is known as a power analysis attack, the most successful has been differential power analysis (DPA). Several countermeasures have been proposed for preventing power analysis attacks with varying degrees of efficacy. One thing all the countermeasures have in common is their large cost in terms of performance and or cost. In this thesis several modifications to the AES algorithm are proposed that seek to inherently secure it against DPA and their effectiveness and cost are investigated.
Due to the statistical nature of DPA there is no set amount of power consumption data that will always give the correct result for a given device, rather, a value for the SNR and the number of power measurements involved in the attack will equate to a probability of success. In this thesis a statistical model of the DPA attack is derived and it is used to find a method for calculating the probability that a particular attack will be successful.
A more benign use for DPA is also discussed. If the signature of a specific pattern of register transitions can be detected in the power consumption of a device then designers can add hardware whose sole purpose is to be detectable in a power trace and act as a watermark to prove the presence of intellectual property.

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