A 50nm channel vertical MOSFET concept incorporating a retrograde channel and a dielectric pocket


Lamb, A. C., Riley, L. S., Hall, S., Kunz, V.D., Groot, C. H. de and Ashburn, P. (2001) A 50nm channel vertical MOSFET concept incorporating a retrograde channel and a dielectric pocket At ESSDERC 2001. , pp. 347-350.

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Description/Abstract

A novel architecture for a vertical MOSFET is proposed and initial investigations conducted by numerical simulation.

Item Type: Conference or Workshop Item (Other)
Additional Information: Address: Not Known
Venue - Dates: ESSDERC 2001, 2001-09-01
Organisations: Nanoelectronics and Nanotechnology
ePrint ID: 256162
Date :
Date Event
September 2001Published
Date Deposited: 07 Jul 2003
Last Modified: 17 Apr 2017 23:08
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/256162

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