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A 50nm channel vertical MOSFET concept incorporating a retrograde channel and a dielectric pocket

Lamb, A. C., Riley, L. S., Hall, S., Kunz, V.D., de Groot, C.H. and Ashburn, P. (2001) A 50nm channel vertical MOSFET concept incorporating a retrograde channel and a dielectric pocket At ESSDERC 2001. , pp. 347-350.

Record type: Conference or Workshop Item (Other)

Abstract

A novel architecture for a vertical MOSFET is proposed and initial investigations conducted by numerical simulation.

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More information

Published date: September 2001
Additional Information: Address: Not Known
Venue - Dates: ESSDERC 2001, 2001-09-01
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 256162
URI: http://eprints.soton.ac.uk/id/eprint/256162
PURE UUID: b86818e6-a582-435d-8318-5e62d4a3894f
ORCID for C.H. de Groot: ORCID iD orcid.org/0000-0002-3850-7101

Catalogue record

Date deposited: 07 Jul 2003
Last modified: 24 Jul 2017 16:42

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Contributors

Author: A. C. Lamb
Author: L. S. Riley
Author: S. Hall
Author: V.D. Kunz
Author: C.H. de Groot ORCID iD
Author: P. Ashburn

University divisions

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