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Using High-Level Synthesis to Implement On-Line Testability

Oikonomakos, Petros and Zwolinski, Mark (2001) Using High-Level Synthesis to Implement On-Line Testability At IEEE Real-Time Embedded Systems Workshop.

Record type: Conference or Workshop Item (Other)


On-line testing increases system reliability, which is essential in a number of applications. High-level synthesis, on the other hand, offers fast time-to-market and allows quick and painless design space exploration. In this work, we investigate on-line testing in the high-level synthesis context. Further, we propose a new technique (inversion testing) and demonstrate its potential benefits.

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Published date: December 2001
Additional Information: presented in IEEE Real-Time Embedded Systems Workshop, December 3, 2001 CD-ROM. Organisation: IEEE
Venue - Dates: IEEE Real-Time Embedded Systems Workshop, 2001-12-01
Organisations: EEE


Local EPrints ID: 256405
PURE UUID: 1cd85270-7c99-4fa2-aaac-8e232a593082
ORCID for Mark Zwolinski: ORCID iD

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Date deposited: 01 May 2002
Last modified: 18 Jul 2017 09:46

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Author: Petros Oikonomakos
Author: Mark Zwolinski ORCID iD

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