A lock-step synchronization algorithm for logic simulation in a multi-solver environment


Kazmierski, T. J., Wang, X. and Mrcarica, Z. (1994) A lock-step synchronization algorithm for logic simulation in a multi-solver environment At Proc. ASIC'94 Conf., Bejing.

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Item Type: Conference or Workshop Item (Other)
Venue - Dates: Proc. ASIC'94 Conf., Bejing, 1994-10-01
Organisations: EEE
ePrint ID: 256525
Date :
Date Event
October 1994Published
Date Deposited: 25 Apr 2002
Last Modified: 17 Apr 2017 23:02
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/256525

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