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The Design of a Hierarchical Circuit-Level Simulator

(1984) The Design of a Hierarchical Circuit-Level Simulator Zwolinski, M and Nichols, KG (eds.) At Electronic Design Automation.

Record type: Conference or Workshop Item (Other)
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Published date: 1984
Additional Information: Event Dates: March 1984
Venue - Dates: Electronic Design Automation, 1984-03-01
Organisations: EEE


Local EPrints ID: 257684
PURE UUID: 5dcf5b5e-8cb0-44b3-843e-c862b4fb1b2e
ORCID for M Zwolinski: ORCID iD

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Date deposited: 17 Jun 2003
Last modified: 18 Jul 2017 09:36

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Editor: M Zwolinski ORCID iD
Editor: KG Nichols

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