A CMOS-Compatible Rapid Vapor-Phase Doping Process for CMOS Scaling

Uchino, Takashi, Ashburn, Peter, Kiyota, Yukihiro and Shiba, Takeo (2004) A CMOS-Compatible Rapid Vapor-Phase Doping Process for CMOS Scaling IEEE Transactions on Electron Devices, 51, (1), pp. 14-19.


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An advanced CMOS process, which used rapid vapor-phase doping (RVD) for pMOSFETs and solid-phase diffusion (SPD) for nMOSFETs, has been developed. Using the RVD technique, a 40-nm-deep p-type extension with a sheet resistance as low as 400 omega/sq has been realised. These RVD and SPD devices demonstrate excellent short-channel characteristics down to 0.1um channel length and 40 percent higher drain current, compared with conventional devices with ion implanted source/drain (S/D) extensions, and high-speed circuit performance. We investigate the effect of the S/D extension structure on the device performance and find that a gate extension overlap of 25nm enables excellent dc and high-speed circuit performance in 0.1um devices

Item Type: Article
Keywords: CMOS Process, doping, junction, MOSFET
Organisations: Nanoelectronics and Nanotechnology
ePrint ID: 258916
Date :
Date Event
January 2004Published
Date Deposited: 02 Mar 2005
Last Modified: 17 Apr 2017 22:38
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/258916

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