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A Physically Based Relation Between Extracted Threshold Voltage and Surface Potential Flat-Band Voltage for MOSFET Compact Modeling

A Physically Based Relation Between Extracted Threshold Voltage and Surface Potential Flat-Band Voltage for MOSFET Compact Modeling
A Physically Based Relation Between Extracted Threshold Voltage and Surface Potential Flat-Band Voltage for MOSFET Compact Modeling
Compact MOS models based on surface potential are now firmly established, but for practical applications there is no reliable link between measured values of threshold voltage and the flat-band voltage on which such models are based. This brief presents an analytical relationship which may be implemented in compact models to provide a reliable and accurate threshold parameter input. Results are compared with a conventional threshold voltage model for several SOI CMOS technologies. This technique has been developed for use with body-tied SOI transistors, and hence it can also be applied to bulk devices.
1019
Benson, James
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D'Halleweyn, Nele V.
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Redman-White, William
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Easson, Craig A.
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Uren, Michael J.
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Faynot, Olivier
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Pelloie, Jean-Luc
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Benson, James
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D'Halleweyn, Nele V.
d60cd0f2-42b9-4094-9bef-1ee2a907ffc4
Redman-White, William
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Easson, Craig A.
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Uren, Michael J.
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Faynot, Olivier
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Pelloie, Jean-Luc
addfc007-e2ae-42f0-b369-4ed0c9e19461

Benson, James, D'Halleweyn, Nele V., Redman-White, William, Easson, Craig A., Uren, Michael J., Faynot, Olivier and Pelloie, Jean-Luc (2001) A Physically Based Relation Between Extracted Threshold Voltage and Surface Potential Flat-Band Voltage for MOSFET Compact Modeling. IEEE Transactions on Electron Devices, 48 (5), 1019.

Record type: Article

Abstract

Compact MOS models based on surface potential are now firmly established, but for practical applications there is no reliable link between measured values of threshold voltage and the flat-band voltage on which such models are based. This brief presents an analytical relationship which may be implemented in compact models to provide a reliable and accurate threshold parameter input. Results are compared with a conventional threshold voltage model for several SOI CMOS technologies. This technique has been developed for use with body-tied SOI transistors, and hence it can also be applied to bulk devices.

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Published date: May 2001
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 260654
URI: https://eprints.soton.ac.uk/id/eprint/260654
PURE UUID: 6e33dc83-0e21-4562-a498-0cf72be0dc0c

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Date deposited: 08 Mar 2005
Last modified: 16 Jul 2019 22:50

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