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Improvements to the Implementation of Interpolant-Based Model Checking

Improvements to the Implementation of Interpolant-Based Model Checking
Improvements to the Implementation of Interpolant-Based Model Checking
The evolution of SAT technology over the last decade has motivated its application in model checking, initially through the utilization of SAT in bounded model checking~(BMC) and, more recently, in unbounded model checking (UMC). This paper addresses the utilization of interpolants in UMC and proposes two techniques for improving the original interpolant-based UMC algorithm. These techniques include improvements to the computation of interpolants, and redefining the organization of the unbounded model checking algorithm given the information extracted from interpolant computation.
3-540-29105-9
367-370
Marques-Silva, Joao
f992f61f-cedd-4897-9f73-1a3ac7ebb35c
Borrione, Dominique
6eff0eae-4a2c-409e-980e-d27c75d7314d
Paul, Wolfgang
d1375eec-4e1b-4bb6-85df-2fd510fab80c
Marques-Silva, Joao
f992f61f-cedd-4897-9f73-1a3ac7ebb35c
Borrione, Dominique
6eff0eae-4a2c-409e-980e-d27c75d7314d
Paul, Wolfgang
d1375eec-4e1b-4bb6-85df-2fd510fab80c

Marques-Silva, Joao (2005) Improvements to the Implementation of Interpolant-Based Model Checking. Borrione, Dominique and Paul, Wolfgang (eds.) Correct Hardware Design and Verification Methods, Saarbrücken, Germany. pp. 367-370 .

Record type: Conference or Workshop Item (Paper)

Abstract

The evolution of SAT technology over the last decade has motivated its application in model checking, initially through the utilization of SAT in bounded model checking~(BMC) and, more recently, in unbounded model checking (UMC). This paper addresses the utilization of interpolants in UMC and proposes two techniques for improving the original interpolant-based UMC algorithm. These techniques include improvements to the computation of interpolants, and redefining the organization of the unbounded model checking algorithm given the information extracted from interpolant computation.

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More information

Published date: 2005
Additional Information: Event Dates: October 2005
Venue - Dates: Correct Hardware Design and Verification Methods, Saarbrücken, Germany, 2005-10-01
Organisations: Electronics & Computer Science

Identifiers

Local EPrints ID: 261691
URI: http://eprints.soton.ac.uk/id/eprint/261691
ISBN: 3-540-29105-9
PURE UUID: edff5e75-88a3-40b9-b986-30d7e56e6801

Catalogue record

Date deposited: 19 Dec 2005
Last modified: 14 Mar 2024 06:57

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Contributors

Author: Joao Marques-Silva
Editor: Dominique Borrione
Editor: Wolfgang Paul

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