Effects of neglecting carrier tunneling on electrostatic potential in calculating direct tunneling gate current in deep submicron MOSFETs


Hakim, MMA and Haque, A (2002) Effects of neglecting carrier tunneling on electrostatic potential in calculating direct tunneling gate current in deep submicron MOSFETs IEEE Transaction on Electron Devices, 49, (9), pp. 1669-1671.

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Description/Abstract

We investigate the validity of the assumption of neglecting carrier tunneling effects on self-consistent electrostatic potential in calculating direct tunneling gate current in deep submicron MOSFETs. Comparison between simulated and experimental results shows that for accurate modeling of direct tunneling current, tunneling effects on potential profile need to be considered. The relative error in gate current due to neglecting carrier tunneling is higher at higher gate voltages and increases with decreasing oxide thickness. We also study the direct tunneling gate current in MOSFETs with high- gate dielectrics.

Item Type: Article
Organisations: Nanoelectronics and Nanotechnology
ePrint ID: 262447
Date :
Date Event
2002Published
Date Deposited: 02 May 2006
Last Modified: 17 Apr 2017 21:42
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/262447

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