Power Aware Learning for Class AB Analogue VLSI Neural Network


Modi, Sankalp, Wilson, Peter and Brown, Andrew (2006) Power Aware Learning for Class AB Analogue VLSI Neural Network At IEEE International Symposium on Circuits and Systems (ISCAS 2006), Greece. 21 - 24 May 2006.

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Description/Abstract

Recent research into Artificial Neural Networks (ANN) has highlighted the potential of using compact analogue ANN hardware cores in embedded mobile devices, where power consumption of ANN hardware is a very significant implementation issue. This paper proposes a learning mechanism suitable for low-power class AB type analogue ANN that not only tunes the network to obtain minimum error, but also adaptively learns to reduce power consumption. Our experiments show substantial reductions in the power budget (30% to 50%) for a variety of example networks as a result of our power-aware learning.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Event Dates: May 21-24, 2006
Venue - Dates: IEEE International Symposium on Circuits and Systems (ISCAS 2006), Greece, 2006-05-21 - 2006-05-24
Keywords: Artificial Neural Networks, ANN hardware, Low-power, Power-aware, learning
Organisations: EEE
ePrint ID: 262564
Date :
Date Event
2006Published
Date Deposited: 12 May 2006
Last Modified: 17 Apr 2017 21:40
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/262564

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