Nanoscale Coulomb blockade memory and logic devices
Nanoscale Coulomb blockade memory and logic devices
155-159
Mizuta, Hiroshi
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Muller, H. O.
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Tsukagoshi, K.
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Williams, D.
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Durrani, Z.
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Irvine, A.
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Amakawa, S.
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Evans, G.
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Nakazato, K.
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Ahmed, H.
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2001
Mizuta, Hiroshi
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Muller, H. O.
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Tsukagoshi, K.
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Williams, D.
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Durrani, Z.
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Irvine, A.
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Amakawa, S.
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Evans, G.
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Nakazato, K.
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Ahmed, H.
f9dabf57-dea0-4cf9-b989-c812b5eedeaf
Mizuta, Hiroshi, Muller, H. O., Tsukagoshi, K., Williams, D., Durrani, Z., Irvine, A., Amakawa, S., Evans, G., Nakazato, K. and Ahmed, H.
(2001)
Nanoscale Coulomb blockade memory and logic devices.
Nanotechnology, 12, .
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paper_45.pdf
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Published date: 2001
Additional Information:
This paper was cited in P.19 and 20 of Emerging Research Devices Chapter of International Technology Roadmap of Semiconductors (ITRS) 2001 & 2003 Editions
Organisations:
Nanoelectronics and Nanotechnology
Identifiers
Local EPrints ID: 266215
URI: http://eprints.soton.ac.uk/id/eprint/266215
ISSN: 0957-4484
PURE UUID: d2dfbbb5-9b63-4cda-a887-2c80f4d764a7
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Date deposited: 22 Jul 2008 09:07
Last modified: 14 Mar 2024 08:22
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Contributors
Author:
Hiroshi Mizuta
Author:
H. O. Muller
Author:
K. Tsukagoshi
Author:
D. Williams
Author:
Z. Durrani
Author:
A. Irvine
Author:
S. Amakawa
Author:
G. Evans
Author:
K. Nakazato
Author:
H. Ahmed
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