Tsuchiya, Yoshishige, Kurihara, T., Saito, D., Niikura, H., Mizuta, Hiroshi and Oda, S. (2007) High-speed and Non-volatile Memory Devices Using a Macroscopic Polarized Stack Consisting of Double Floating Gates Interconnected with Engineered Tunnel Oxide Barriers. IEEE Silicon Nanoelectronics Workshop, Kyoto. pp 145-146 .
Record type:
Conference or Workshop Item
(Poster)
More information
Published date: June 2007
Additional Information:
Event Dates: June 2007
Venue - Dates:
IEEE Silicon Nanoelectronics Workshop, Kyoto, 2007-06-01
Organisations:
Nanoelectronics and Nanotechnology
Identifiers
Local EPrints ID: 266282
URI: http://eprints.soton.ac.uk/id/eprint/266282
PURE UUID: dac57496-cc14-42de-9b04-5f659cf14cf6
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Date deposited: 23 Jul 2008 09:43
Last modified: 14 Mar 2024 08:24
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Contributors
Author:
Yoshishige Tsuchiya
Author:
T. Kurihara
Author:
D. Saito
Author:
H. Niikura
Author:
Hiroshi Mizuta
Author:
S. Oda
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