High-speed and Non-volatile Memory Devices Using a Macroscopic Polarized Stack Consisting of Double Floating Gates Interconnected with Engineered Tunnel Oxide Barriers


Tsuchiya, Yoshishige, Kurihara, T., Saito, D., Niikura, H., Mizuta, Hiroshi and Oda, S. (2007) High-speed and Non-volatile Memory Devices Using a Macroscopic Polarized Stack Consisting of Double Floating Gates Interconnected with Engineered Tunnel Oxide Barriers At IEEE Silicon Nanoelectronics Workshop. , pp 145-146.

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Item Type: Conference or Workshop Item (Poster)
Additional Information: Event Dates: June 2007
Venue - Dates: IEEE Silicon Nanoelectronics Workshop, 2007-06-01
Organisations: Nanoelectronics and Nanotechnology
ePrint ID: 266282
Date :
Date Event
June 2007Published
Date Deposited: 23 Jul 2008 09:43
Last Modified: 17 Apr 2017 19:05
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/266282

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