Bottom-up fabrication of Si nanodot transistors using the nc-Si dots solution
Bottom-up fabrication of Si nanodot transistors using the nc-Si dots solution
A new approach to fabricate nanometer-scale silicon devices is recently attracting much attention, which combines the conventional top-down silicon processing techniques and the bottom-up assembly of silicon nanodots, whose structures are controlled on the atomic scale. This technique enables to investigate the electronic states and transport properties of strongly-coupled multiple nanodots which will be crucial particularly for quantum information device applications. Various unique properties have been studied in such systems. For example, electrostatic interactions have been investigated for double Si dots [1] and for the two-dimensional Si multidots [2]. Coherent wavefunction coupling and associated quasi-molecular states have also been observed for a tunnel-coupled double Si nanodots [3]. In addition, metal-insulator transition has been investigated for an artificial lattice of self-organized nano-paraticles [4]. In this paper we propose and examine a novel technique of fabricating nanoscale transistors with a Si nanodot cluster as a channel based on the self-assembly of the nanocrystalline Si dots from the solution on the patterned SOI substrates.
Yamahata, G.
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Tanaka, A.
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Kawata, Y.
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Tsuchiya, Yoshishige
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Saito, S.
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Arai, T.
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Mizuta, Hiroshi
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Oda, S.
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June 2005
Yamahata, G.
ea3ea646-33fb-4168-9216-1b7bea9ed402
Tanaka, A.
baff8117-8be2-4dfd-a68b-6415e0929347
Kawata, Y.
b09a7d16-5971-4e08-b49f-16a2a1c5b9a2
Tsuchiya, Yoshishige
5a5178c6-b3a9-4e07-b9b2-9a28e49f1dc2
Saito, S.
5a819d3c-9621-43ed-83a3-d326c2575e57
Arai, T.
7f53022e-dbb2-4eda-b354-71662925bb30
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
Oda, S.
4a88f225-39f6-4c89-a9da-8c35fbfe6fde
Yamahata, G., Tanaka, A., Kawata, Y., Tsuchiya, Yoshishige, Saito, S., Arai, T., Mizuta, Hiroshi and Oda, S.
(2005)
Bottom-up fabrication of Si nanodot transistors using the nc-Si dots solution.
IEEE Silicon Nanoelectronics Workshop, , Kyoto, Japan.
2 pp
.
Record type:
Conference or Workshop Item
(Poster)
Abstract
A new approach to fabricate nanometer-scale silicon devices is recently attracting much attention, which combines the conventional top-down silicon processing techniques and the bottom-up assembly of silicon nanodots, whose structures are controlled on the atomic scale. This technique enables to investigate the electronic states and transport properties of strongly-coupled multiple nanodots which will be crucial particularly for quantum information device applications. Various unique properties have been studied in such systems. For example, electrostatic interactions have been investigated for double Si dots [1] and for the two-dimensional Si multidots [2]. Coherent wavefunction coupling and associated quasi-molecular states have also been observed for a tunnel-coupled double Si nanodots [3]. In addition, metal-insulator transition has been investigated for an artificial lattice of self-organized nano-paraticles [4]. In this paper we propose and examine a novel technique of fabricating nanoscale transistors with a Si nanodot cluster as a channel based on the self-assembly of the nanocrystalline Si dots from the solution on the patterned SOI substrates.
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Published date: June 2005
Additional Information:
Event Dates: June 2005
Venue - Dates:
IEEE Silicon Nanoelectronics Workshop, , Kyoto, Japan, 2005-06-01
Organisations:
Nanoelectronics and Nanotechnology
Identifiers
Local EPrints ID: 266321
URI: http://eprints.soton.ac.uk/id/eprint/266321
PURE UUID: 14158256-bac7-47ca-8de2-dfd5d2d88417
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Date deposited: 23 Jul 2008 11:33
Last modified: 14 Mar 2024 08:25
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Contributors
Author:
G. Yamahata
Author:
A. Tanaka
Author:
Y. Kawata
Author:
Yoshishige Tsuchiya
Author:
S. Saito
Author:
T. Arai
Author:
Hiroshi Mizuta
Author:
S. Oda
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