High-speed single-electron memory: cell design and architecture
High-speed single-electron memory: cell design and architecture
pp 67-72
Mizuta, Hiroshi
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Williams, D.
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Katayama, K.
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Muller, H. -O.
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Nakazato, K.
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Ahmed, H.
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March 1998
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
Williams, D.
bcbcd58d-a02f-414c-8d2a-b1b05fead720
Katayama, K.
1fbb45dd-00f3-49bc-adf6-cd9c74014741
Muller, H. -O.
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Nakazato, K.
b12e41d3-3527-48ed-9ecd-b38f774ba838
Ahmed, H.
f9dabf57-dea0-4cf9-b989-c812b5eedeaf
Mizuta, Hiroshi, Williams, D., Katayama, K., Muller, H. -O., Nakazato, K. and Ahmed, H.
(1998)
High-speed single-electron memory: cell design and architecture.
2nd Int. WS on Physics and Modeling of Devices Based on Low-Dimensional Structures, Aizu-Wakamatsu.
.
Record type:
Conference or Workshop Item
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cpaper_024.pdf
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Published date: March 1998
Additional Information:
(invited talk) Event Dates: March 1998
Venue - Dates:
2nd Int. WS on Physics and Modeling of Devices Based on Low-Dimensional Structures, Aizu-Wakamatsu, 1998-03-01
Organisations:
Nanoelectronics and Nanotechnology
Identifiers
Local EPrints ID: 266387
URI: http://eprints.soton.ac.uk/id/eprint/266387
PURE UUID: a75013fd-b4b8-498b-83b1-6cafa54a6d98
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Date deposited: 28 Jul 2008 08:48
Last modified: 14 Mar 2024 08:27
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Contributors
Author:
Hiroshi Mizuta
Author:
D. Williams
Author:
K. Katayama
Author:
H. -O. Muller
Author:
K. Nakazato
Author:
H. Ahmed
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