Design of New Logic Architectures Utilizing Optimized Suspended-Gate Single-Electron Transistors


Pruvost, B, Uchida, K, Mizuta, Hiroshi and Oda, S (2009) Design of New Logic Architectures Utilizing Optimized Suspended-Gate Single-Electron Transistors IEEE Transactions on Nanotechnology

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Item Type: Article
Organisations: Nanoelectronics and Nanotechnology
ePrint ID: 267766
Date :
Date Event
2009Published
Date Deposited: 10 Aug 2009 11:52
Last Modified: 17 Apr 2017 18:42
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/267766

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