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Effect of Variability in SWCNT-Based Logic Gates

Shahidipour, Hamed, Ahmadi, Arash and Maharatna, Koushik (2009) Effect of Variability in SWCNT-Based Logic Gates At International Symposium on Integrated Circuits (ISIC2009), Singapore.

Record type: Conference or Workshop Item (Other)


This work is concerned with Carbon Nanotube diameter variations and the resulting uncertainties on the behavior of logic gates made from Single Walled Carbon Nanotubes (SWCNTs). Monte Carlo simulations were performed for logic gates based on CNTs of different mean diameters using the Stanford CNFET model. Delay characteristics of logic gates (NOT, NAND, NOR) are studied. This work reveals that logic gates employing SWCNTs with mean diameters greater than about 1.2 nm, show less variation in their timing characteristics, provided that a CNT diameter standard deviation of less than 0.1nm can be guaranteed by a technology process.

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Published date: December 2009
Additional Information: Event Dates: 16/12/2009
Venue - Dates: International Symposium on Integrated Circuits (ISIC2009), Singapore, 2009-12-16
Organisations: Electronic & Software Systems


Local EPrints ID: 267985
PURE UUID: 44f619cc-9ebb-42fb-9031-de6e44834057

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Date deposited: 01 Oct 2009 18:42
Last modified: 18 Jul 2017 06:58

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Author: Hamed Shahidipour
Author: Arash Ahmadi

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