Effect of Variability in SWCNT-Based Logic Gates

Shahidipour, Hamed, Ahmadi, Arash and Maharatna, Koushik (2009) Effect of Variability in SWCNT-Based Logic Gates At International Symposium on Integrated Circuits (ISIC2009), Singapore.


[img] PDF P0265.pdf - Accepted Manuscript
Download (632kB)


This work is concerned with Carbon Nanotube diameter variations and the resulting uncertainties on the behavior of logic gates made from Single Walled Carbon Nanotubes (SWCNTs). Monte Carlo simulations were performed for logic gates based on CNTs of different mean diameters using the Stanford CNFET model. Delay characteristics of logic gates (NOT, NAND, NOR) are studied. This work reveals that logic gates employing SWCNTs with mean diameters greater than about 1.2 nm, show less variation in their timing characteristics, provided that a CNT diameter standard deviation of less than 0.1nm can be guaranteed by a technology process.

Item Type: Conference or Workshop Item (Other)
Additional Information: Event Dates: 16/12/2009
Venue - Dates: International Symposium on Integrated Circuits (ISIC2009), Singapore, 2009-12-16
Organisations: Electronic & Software Systems
ePrint ID: 267985
Date :
Date Event
December 2009Published
Date Deposited: 01 Oct 2009 18:42
Last Modified: 17 Apr 2017 18:39
Further Information:Google Scholar
URI: http://eprints.soton.ac.uk/id/eprint/267985

Actions (login required)

View Item View Item