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Very Large Scale Integration Architecture for Integer Wavelet Transform

Very Large Scale Integration Architecture for Integer Wavelet Transform
Very Large Scale Integration Architecture for Integer Wavelet Transform
The design of a new real-time integer-to-integer lifting-based wavelet transform (IWT) architecture is described. An efficient design method is proposed to construct an integrated programmable VLSI architecture that can operate as a forward or backward IWT in a pipelined fashion. The layout of the integrated VLSI structure is simple, modular, and cascadable for computing a wavelet transform based on 5/3 biorthogonal filters. The architecture is optimal with respect to both area and time and independent of the size of the input signal without requiring additional memory. The lifting steps are adapted to be causal and the proposed architecture is suitable for use in real-time processing applications. The critical path of the architecture is equal to the critical path of one lifting step. The numerical precision has been established using a Simulink model. Experimental tests have been made with 8-bit signed two's complement integer numbers. Based on the experimental results, the datapath width of the proposed architecture is fixed at 10 bits.
VLSI, DIGITAL SIGNAL PROCESSING CHIPS, WAVELET TRANSFORMS
471-483
Al-Sulaifanie, Ahmed
b97e8e42-3916-47c5-b4b0-9ccc5c755160
Ahmadi, Arash
c88cc469-b208-4dad-9541-af5e555e0748
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Al-Sulaifanie, Ahmed
b97e8e42-3916-47c5-b4b0-9ccc5c755160
Ahmadi, Arash
c88cc469-b208-4dad-9541-af5e555e0748
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0

Al-Sulaifanie, Ahmed, Ahmadi, Arash and Zwolinski, Mark (2010) Very Large Scale Integration Architecture for Integer Wavelet Transform IET Computers & Digital Techniques, 4, (6), pp. 471-483.

Record type: Article

Abstract

The design of a new real-time integer-to-integer lifting-based wavelet transform (IWT) architecture is described. An efficient design method is proposed to construct an integrated programmable VLSI architecture that can operate as a forward or backward IWT in a pipelined fashion. The layout of the integrated VLSI structure is simple, modular, and cascadable for computing a wavelet transform based on 5/3 biorthogonal filters. The architecture is optimal with respect to both area and time and independent of the size of the input signal without requiring additional memory. The lifting steps are adapted to be causal and the proposed architecture is suitable for use in real-time processing applications. The critical path of the architecture is equal to the critical path of one lifting step. The numerical precision has been established using a Simulink model. Experimental tests have been made with 8-bit signed two's complement integer numbers. Based on the experimental results, the datapath width of the proposed architecture is fixed at 10 bits.

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Published date: December 2010
Keywords: VLSI, DIGITAL SIGNAL PROCESSING CHIPS, WAVELET TRANSFORMS
Organisations: EEE

Identifiers

Local EPrints ID: 268513
URI: http://eprints.soton.ac.uk/id/eprint/268513
PURE UUID: a4496e13-7f79-45b1-854b-41ec10546aff
ORCID for Mark Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 16 Feb 2010 15:15
Last modified: 18 Jul 2017 06:53

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Contributors

Author: Ahmed Al-Sulaifanie
Author: Arash Ahmadi
Author: Mark Zwolinski ORCID iD

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