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Design of a low-power on-body ECG classifier for remote cardiovascular monitoring systems

Design of a low-power on-body ECG classifier for remote cardiovascular monitoring systems
Design of a low-power on-body ECG classifier for remote cardiovascular monitoring systems
In this paper we first present a detailed study on the trade-off between the computational complexity (directly related to the power consumption) and classification accuracy for a number of classifiers for classifying normal and abnormal ECGs. In our analysis we consider the spectral energy of the constituent waves of the ECG as the discriminative feature. Starting with the exhaustive exploration of single heart-beat based classification to ascertain the complexity-accuracy trade-off in different classification algorithms, we then extend our study for multiple heartbeat based classification. We use data available in Physionet as well as samples from Southampton General Hospital Cardiology Department for our investigation. Our primary conclusion is that a classifier based on Linear Discriminant Analysis (LDA) achieves comparable level of accuracy to the best performing Support Vector Machine (SVM) classifiers with advantage of significantly reduced computational complexity. Subsequently, we propose an ultra low-power circuit implementation of the LDA classifier that could be integrated with the ECG sensor node enabling on-body normal and abnormal ECG classification. The simulated circuit is synthesized at 130 nm technology and occupies 0.70 mm² of silicon area (0.979 mm² after Place and Route) while it consumes 182.94nW @ 1.08 V, estimated with Synopsys PrimeTime when operating at 1 KHz. These results clearly demonstrate the potential for low-power implementation of the proposed design.
75-85
Chen, Taihai
62b1db38-757b-4250-8b48-de4e47f09d9e
Mazomenos, Evangelos B.
23983827-c7e7-4ee1-bfc8-986aa3594279
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Dasmahapatra, Srinandan
eb5fd76f-4335-4ae9-a88a-20b9e2b3f698
Niranjan, Mahesan
5cbaeea8-7288-4b55-a89c-c43d212ddd4f
Chen, Taihai
62b1db38-757b-4250-8b48-de4e47f09d9e
Mazomenos, Evangelos B.
23983827-c7e7-4ee1-bfc8-986aa3594279
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Dasmahapatra, Srinandan
eb5fd76f-4335-4ae9-a88a-20b9e2b3f698
Niranjan, Mahesan
5cbaeea8-7288-4b55-a89c-c43d212ddd4f

Chen, Taihai, Mazomenos, Evangelos B., Maharatna, Koushik, Dasmahapatra, Srinandan and Niranjan, Mahesan (2013) Design of a low-power on-body ECG classifier for remote cardiovascular monitoring systems. IEEE Journal of Emerging and Selected Topics in Circuits and Systems, 3 (1), 75-85. (doi:10.1109/JETCAS.2013.2242772).

Record type: Article

Abstract

In this paper we first present a detailed study on the trade-off between the computational complexity (directly related to the power consumption) and classification accuracy for a number of classifiers for classifying normal and abnormal ECGs. In our analysis we consider the spectral energy of the constituent waves of the ECG as the discriminative feature. Starting with the exhaustive exploration of single heart-beat based classification to ascertain the complexity-accuracy trade-off in different classification algorithms, we then extend our study for multiple heartbeat based classification. We use data available in Physionet as well as samples from Southampton General Hospital Cardiology Department for our investigation. Our primary conclusion is that a classifier based on Linear Discriminant Analysis (LDA) achieves comparable level of accuracy to the best performing Support Vector Machine (SVM) classifiers with advantage of significantly reduced computational complexity. Subsequently, we propose an ultra low-power circuit implementation of the LDA classifier that could be integrated with the ECG sensor node enabling on-body normal and abnormal ECG classification. The simulated circuit is synthesized at 130 nm technology and occupies 0.70 mm² of silicon area (0.979 mm² after Place and Route) while it consumes 182.94nW @ 1.08 V, estimated with Synopsys PrimeTime when operating at 1 KHz. These results clearly demonstrate the potential for low-power implementation of the proposed design.

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e-pub ahead of print date: 26 February 2013
Published date: March 2013
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 347400
URI: http://eprints.soton.ac.uk/id/eprint/347400
PURE UUID: 8ce839dc-4268-43ff-93a9-32f6512237f7
ORCID for Mahesan Niranjan: ORCID iD orcid.org/0000-0001-7021-140X

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Date deposited: 06 Feb 2013 12:22
Last modified: 15 Mar 2024 03:29

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Contributors

Author: Taihai Chen
Author: Evangelos B. Mazomenos
Author: Koushik Maharatna
Author: Srinandan Dasmahapatra
Author: Mahesan Niranjan ORCID iD

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