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DeSyRe: on-Demand System Reliability

DeSyRe: on-Demand System Reliability
DeSyRe: on-Demand System Reliability
The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect and fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints.
fault-tolerance, system-on-chip, reconfigurable hardware, medical systems
981-1001
Sourdis, Ioannis
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Strydis, Christos
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Armato, Antonino
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Bouganis, Christos-Savvas
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Falsafi, Babak
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Gaydadjiev, Georgi
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Isaza, Sebastian
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Malek, Alirad
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Mariani, Riccardo
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Pnevmatikatos, Dionisios N
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Pradhan, Dhiraj K
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Rauwerda, Gerard
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Seepers, Robert
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Shafik, Rishad Ahmed
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Sunesen, Kim
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Theodoropoulos, Dimitris
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Tzilis, Stavros
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Vavouras, Michail
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Sourdis, Ioannis
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Strydis, Christos
2b716e18-808c-4e5e-9219-703a051accff
Armato, Antonino
6c5b1b31-2182-41ad-af21-91cef0d6bc1f
Bouganis, Christos-Savvas
72b75af8-db1f-461e-ab8b-903924b688f1
Falsafi, Babak
d71349b8-bbea-4b33-8048-769912a849e5
Gaydadjiev, Georgi
eb52c11e-7639-425a-88e6-8e59f69c91dd
Isaza, Sebastian
12e3f192-0625-454a-b371-bf388138c7ac
Malek, Alirad
c0c92b77-6603-4b04-8635-2a43606bd027
Mariani, Riccardo
fe41c9bd-ea5c-41a2-883a-5f25150f45da
Pnevmatikatos, Dionisios N
7e5e8fb8-e6f0-4d39-81a2-44fb11bee6b3
Pradhan, Dhiraj K
78edbd6a-a8c0-4db0-951f-d88c687ec8a1
Rauwerda, Gerard
1a2aded0-eaaf-4d7e-afc4-60f2bb965f94
Seepers, Robert
de2b5772-338c-4dd8-8332-64ca7fe2e98b
Shafik, Rishad Ahmed
aa0bdafc-b022-4cb2-a8ef-4bf8a03ba524
Sunesen, Kim
a47ee18a-288b-44a8-aa2e-749db07a54c5
Theodoropoulos, Dimitris
fc23241f-92a8-4e79-81cb-b1f469f61b48
Tzilis, Stavros
ed728312-423e-4b5d-b342-a601a07fa6ef
Vavouras, Michail
5ecdacd3-e95d-4167-b4a5-b8a258ea783e

Sourdis, Ioannis, Strydis, Christos, Armato, Antonino, Bouganis, Christos-Savvas, Falsafi, Babak, Gaydadjiev, Georgi, Isaza, Sebastian, Malek, Alirad, Mariani, Riccardo, Pnevmatikatos, Dionisios N, Pradhan, Dhiraj K, Rauwerda, Gerard, Seepers, Robert, Shafik, Rishad Ahmed, Sunesen, Kim, Theodoropoulos, Dimitris, Tzilis, Stavros and Vavouras, Michail (2013) DeSyRe: on-Demand System Reliability. Microprocessors and Microsystems, 37 (2013), 981-1001. (doi:10.1016/j.micpro.2013.08.008).

Record type: Article

Abstract

The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect and fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints.

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MICPRO-D-12-00165R1-1.pdf - Accepted Manuscript
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More information

e-pub ahead of print date: 11 September 2013
Published date: 2013
Keywords: fault-tolerance, system-on-chip, reconfigurable hardware, medical systems
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 356269
URI: http://eprints.soton.ac.uk/id/eprint/356269
PURE UUID: dc80190a-4112-4915-b475-b30d445bec88

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Date deposited: 12 Sep 2013 15:27
Last modified: 14 Mar 2024 14:46

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Contributors

Author: Ioannis Sourdis
Author: Christos Strydis
Author: Antonino Armato
Author: Christos-Savvas Bouganis
Author: Babak Falsafi
Author: Georgi Gaydadjiev
Author: Sebastian Isaza
Author: Alirad Malek
Author: Riccardo Mariani
Author: Dionisios N Pnevmatikatos
Author: Dhiraj K Pradhan
Author: Gerard Rauwerda
Author: Robert Seepers
Author: Rishad Ahmed Shafik
Author: Kim Sunesen
Author: Dimitris Theodoropoulos
Author: Stavros Tzilis
Author: Michail Vavouras

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