A novel dual-walled CNT bus architecture with reduced cross-coupling features
A novel dual-walled CNT bus architecture with reduced cross-coupling features
Carbon Nano Tubes (CNTs) have been widely proposed as interconnect fabric for nano and very deep sub-micron (silicon-based) technologies due to their robustness to electromigration. In this paper, a novel bus architecture with low crosstalk features is proposed. It is made of dual-walled nanotubes (DWNTs) arranged in parallel. It achieves reductions up to 72% of the crosstalk-induced delay, and up to 76% for the crosstalk-induced peak voltage, at a modest area increase. Therefore, the proposed bus arrangement significantly improves performance and provides reliable operation in an interconnect.
1-4244-0078-3
258-261
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Cazeaux, Jose' Manuel
de02151c-4f59-4686-a730-18f78d372562
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Lombardi, Fabrizio
e36a0194-d0fc-443b-82c5-72cefd730b0f
June 2006
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Cazeaux, Jose' Manuel
de02151c-4f59-4686-a730-18f78d372562
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Lombardi, Fabrizio
e36a0194-d0fc-443b-82c5-72cefd730b0f
Rossi, Daniele, Cazeaux, Jose' Manuel, Metra, Cecilia and Lombardi, Fabrizio
(2006)
A novel dual-walled CNT bus architecture with reduced cross-coupling features.
Sixth IEEE Conference on Nanotechnology (IEEE-NANO 2006), Cincinnati, United States.
17 - 20 Jun 2006.
.
(doi:10.1109/NANO.2006.247623).
Record type:
Conference or Workshop Item
(Paper)
Abstract
Carbon Nano Tubes (CNTs) have been widely proposed as interconnect fabric for nano and very deep sub-micron (silicon-based) technologies due to their robustness to electromigration. In this paper, a novel bus architecture with low crosstalk features is proposed. It is made of dual-walled nanotubes (DWNTs) arranged in parallel. It achieves reductions up to 72% of the crosstalk-induced delay, and up to 76% for the crosstalk-induced peak voltage, at a modest area increase. Therefore, the proposed bus arrangement significantly improves performance and provides reliable operation in an interconnect.
Text
nano06.pdf
- Accepted Manuscript
More information
Published date: June 2006
Venue - Dates:
Sixth IEEE Conference on Nanotechnology (IEEE-NANO 2006), Cincinnati, United States, 2006-06-17 - 2006-06-20
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 368902
URI: http://eprints.soton.ac.uk/id/eprint/368902
ISBN: 1-4244-0078-3
PURE UUID: 71eb4013-1d7d-4050-8dbf-dd3a9cb1f35f
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Date deposited: 02 Oct 2014 14:25
Last modified: 14 Mar 2024 17:55
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Contributors
Author:
Daniele Rossi
Author:
Jose' Manuel Cazeaux
Author:
Cecilia Metra
Author:
Fabrizio Lombardi
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