A CORDIC-based low-power statistical feature computation engine for WSN applications
A CORDIC-based low-power statistical feature computation engine for WSN applications
In this paper we present a carry-save arithmetic (CSA) based Coordinate Rotation Digital Computer (CORDIC) engine for computing eight fundamental time domain statistical features. These features are used commonly in association with major classifiers in remote health monitoring systems with an aim of executing them on a node of Wireless Sensor Network (WSN). The engine computes all the eight features sequentially in 3n clock cycles where n is the number of data samples. We further present a comparative analysis of the hardware complexity of our proposed architecture with an alternate architecture which does not use CORDIC (instead uses standalone array multiplier, divider, square rooter and logarithm converter). The hardware complexity of the two architectures presented in terms of full adder count reflects the effectiveness of using CORDIC for the given application. The engine was synthesized using the STMicroelectronics 130 nm technology library and occupied 205K NAND2 equivalent cell area and consumed 1nW dynamic power @ 50 Hz as estimated using Prime time. Therefore, the design can be applicable for low-power real-time operations within a WSN node.
wireless sensor network, cordic, statistical feature extraction, classification, low power
Biswas, Dwaipayan
76983b74-d729-4aae-94c3-94d05e9b2ed4
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
3 April 2015
Biswas, Dwaipayan
76983b74-d729-4aae-94c3-94d05e9b2ed4
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Biswas, Dwaipayan and Maharatna, Koushik
(2015)
A CORDIC-based low-power statistical feature computation engine for WSN applications.
Circuits, Systems & Signal Processing.
(doi:10.1007/s00034-015-0041-5).
Abstract
In this paper we present a carry-save arithmetic (CSA) based Coordinate Rotation Digital Computer (CORDIC) engine for computing eight fundamental time domain statistical features. These features are used commonly in association with major classifiers in remote health monitoring systems with an aim of executing them on a node of Wireless Sensor Network (WSN). The engine computes all the eight features sequentially in 3n clock cycles where n is the number of data samples. We further present a comparative analysis of the hardware complexity of our proposed architecture with an alternate architecture which does not use CORDIC (instead uses standalone array multiplier, divider, square rooter and logarithm converter). The hardware complexity of the two architectures presented in terms of full adder count reflects the effectiveness of using CORDIC for the given application. The engine was synthesized using the STMicroelectronics 130 nm technology library and occupied 205K NAND2 equivalent cell area and consumed 1nW dynamic power @ 50 Hz as estimated using Prime time. Therefore, the design can be applicable for low-power real-time operations within a WSN node.
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Published date: 3 April 2015
Keywords:
wireless sensor network, cordic, statistical feature extraction, classification, low power
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 375703
URI: http://eprints.soton.ac.uk/id/eprint/375703
ISSN: 0278-081X
PURE UUID: be1f3508-a1d7-4893-9816-684e1116a518
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Date deposited: 13 Apr 2015 09:09
Last modified: 14 Mar 2024 19:30
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Author:
Dwaipayan Biswas
Author:
Koushik Maharatna
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