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An RRAM biasing parameter optimizer

An RRAM biasing parameter optimizer
An RRAM biasing parameter optimizer
Research on memory devices is a highly active field, and many new technologies are being constantly developed. However, characterizing them and understanding how to bias for optimal performance are becoming an increasingly tight bottleneck. Here, we propose a novel technique for extracting biasing parameters, conducive to desirable switching behavior in a highly automated manner, thereby shortening the process development cycles. The principle of operation is based on: 1) applying variable amplitude, pulse-mode stimulation on a test device in order to induce switching multiple times; 2) collecting the data on how pulsing parameters affect the device’s resistive state; and 3) choosing the most suitable biasing parameters for the application at hand. The utility of the proposed technique is validated on TiOx-based prototypes, where we demonstrate the successful extraction of biasing parameters that allow the operation of our devices both as multistate and binary resistive switches.
characterization, memristor, resistive random access memory, testing
3685-3691
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Khiat, Ali
bf549ddd-5356-4a7d-9c12-eb6c0d904050
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Khiat, Ali
bf549ddd-5356-4a7d-9c12-eb6c0d904050
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf

Serb, Alexantrou, Khiat, Ali and Prodromakis, Themistoklis (2015) An RRAM biasing parameter optimizer. IEEE Transactions on Electron Devices, 62 (11), 3685-3691. (doi:10.1109/TED.2015.2478491).

Record type: Article

Abstract

Research on memory devices is a highly active field, and many new technologies are being constantly developed. However, characterizing them and understanding how to bias for optimal performance are becoming an increasingly tight bottleneck. Here, we propose a novel technique for extracting biasing parameters, conducive to desirable switching behavior in a highly automated manner, thereby shortening the process development cycles. The principle of operation is based on: 1) applying variable amplitude, pulse-mode stimulation on a test device in order to induce switching multiple times; 2) collecting the data on how pulsing parameters affect the device’s resistive state; and 3) choosing the most suitable biasing parameters for the application at hand. The utility of the proposed technique is validated on TiOx-based prototypes, where we demonstrate the successful extraction of biasing parameters that allow the operation of our devices both as multistate and binary resistive switches.

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More information

Accepted/In Press date: 10 September 2015
e-pub ahead of print date: 25 September 2015
Published date: November 2015
Keywords: characterization, memristor, resistive random access memory, testing
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 384076
URI: https://eprints.soton.ac.uk/id/eprint/384076
PURE UUID: 211331f4-08c1-4102-8d2f-6a4f8fb7497e
ORCID for Themistoklis Prodromakis: ORCID iD orcid.org/0000-0002-6267-6909

Catalogue record

Date deposited: 15 Dec 2015 10:20
Last modified: 10 Sep 2019 00:35

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