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Accurate and stable run-time power modeling for mobile and embedded CPUs

Accurate and stable run-time power modeling for mobile and embedded CPUs
Accurate and stable run-time power modeling for mobile and embedded CPUs
Modern mobile and embedded devices are required to be increasingly energy-efficient while running more sophisticated tasks, causing the CPU design to become more complex and employ more energy-saving techniques. This has created a greater need for fast and accurate power estimation frameworks for both run-time CPU energy management and design-space exploration. We present a statistically rigorous and novel methodology for building accurate run-time power models using Performance Monitoring Counters (PMCs) for mobile and embedded devices, and demonstrate how our models make more efficient use of limited training data and better adapt to unseen scenarios by uniquely considering stability. Our robust model formulation reduces multicollinearity, allows separation of static and dynamic power, and allows a 100× reduction in experiment time while sacrificing only 0.6% accuracy. We present a statistically detailed evaluation of our model, highlighting and addressing the problem of heteroscedasticity in power modeling. We present software implementing our methodology and build power models for ARM Cortex-A7 and Cortex-A15 CPUs, with 3.8% and 2.8% average error, respectively. We model the behavior of the non- ideal CPU voltage regulator under dynamic CPU activity to improve modeling accuracy by up to 5.5% in situations where the voltage cannot be measured. To address the lack of research utilizing PMC data from real mobile devices, we also present our data acquisition method and experimental platform software. We support this work with online resources including software tools, documentation, raw data and further results.
power modeling and estimation, embedded systems, performance monitoring counters, PMC event selection
1-14
Walker, Matthew
77e58c74-1541-4ffc-9219-4c8c11248a2e
Diestelhorst, Stephan
5ac0a14f-5a42-4e09-a173-399b97170272
Hansson, Andreas
b535ff1d-9917-4816-b36f-59d1ad2bd137
Das, Anup
2a0d6cea-309b-4053-a62e-234807f89306
Yang, Sheng
04b9848f-ddd4-4d8f-93b6-b91a2144d49c
Al-Hashimi, Bashir M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Merrett, Geoff V.
89b3a696-41de-44c3-89aa-b0aa29f54020
Walker, Matthew
77e58c74-1541-4ffc-9219-4c8c11248a2e
Diestelhorst, Stephan
5ac0a14f-5a42-4e09-a173-399b97170272
Hansson, Andreas
b535ff1d-9917-4816-b36f-59d1ad2bd137
Das, Anup
2a0d6cea-309b-4053-a62e-234807f89306
Yang, Sheng
04b9848f-ddd4-4d8f-93b6-b91a2144d49c
Al-Hashimi, Bashir M.
0b29c671-a6d2-459c-af68-c4614dce3b5d
Merrett, Geoff V.
89b3a696-41de-44c3-89aa-b0aa29f54020

Walker, Matthew, Diestelhorst, Stephan, Hansson, Andreas, Das, Anup, Yang, Sheng, Al-Hashimi, Bashir M. and Merrett, Geoff V. (2017) Accurate and stable run-time power modeling for mobile and embedded CPUs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (1), 1-14. (doi:10.1109/TCAD.2016.2562920).

Record type: Article

Abstract

Modern mobile and embedded devices are required to be increasingly energy-efficient while running more sophisticated tasks, causing the CPU design to become more complex and employ more energy-saving techniques. This has created a greater need for fast and accurate power estimation frameworks for both run-time CPU energy management and design-space exploration. We present a statistically rigorous and novel methodology for building accurate run-time power models using Performance Monitoring Counters (PMCs) for mobile and embedded devices, and demonstrate how our models make more efficient use of limited training data and better adapt to unseen scenarios by uniquely considering stability. Our robust model formulation reduces multicollinearity, allows separation of static and dynamic power, and allows a 100× reduction in experiment time while sacrificing only 0.6% accuracy. We present a statistically detailed evaluation of our model, highlighting and addressing the problem of heteroscedasticity in power modeling. We present software implementing our methodology and build power models for ARM Cortex-A7 and Cortex-A15 CPUs, with 3.8% and 2.8% average error, respectively. We model the behavior of the non- ideal CPU voltage regulator under dynamic CPU activity to improve modeling accuracy by up to 5.5% in situations where the voltage cannot be measured. To address the lack of research utilizing PMC data from real mobile devices, we also present our data acquisition method and experimental platform software. We support this work with online resources including software tools, documentation, raw data and further results.

Text mjw-manuscript-2016-05-01.pdf - Accepted Manuscript
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More information

Accepted/In Press date: 19 April 2016
e-pub ahead of print date: 4 May 2016
Published date: January 2017
Keywords: power modeling and estimation, embedded systems, performance monitoring counters, PMC event selection
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 393728
URI: https://eprints.soton.ac.uk/id/eprint/393728
PURE UUID: fe1aa00f-43a1-41e8-b8de-ec3769856953
ORCID for Matthew Walker: ORCID iD orcid.org/0000-0001-6368-3644
ORCID for Geoff V. Merrett: ORCID iD orcid.org/0000-0003-4980-3894

Catalogue record

Date deposited: 03 May 2016 08:26
Last modified: 06 Oct 2018 00:35

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