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The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology

Halak, Basel, Tenentes, Vasileios and Rossi, Daniele (2016) The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology Microelectronics Reliability, 67, pp. 74-81. (doi:10.1016/j.microrel.2016.10.018).

Record type: Article

Abstract

On-chip level shifters are the interface between parts of an Integrated Circuit (IC) that operate in different voltage levels. For this reason, they are indispensable blocks in Multi-Vdd System-on-Chips (SoCs). In this paper, we present a simulation flow that we propose for a comprehensive evaluation of the effects of Bias Temperature Instability (BTI) aging on the delay and the power consumption of level shifters. We evaluate the standard High-to-Low/Low-to-High level shifters, as well as several recently proposed level-shifter designs, implemented using a 32nm CMOS technology. We demonstrate that the delay degradation due to BTI aging varies for each level shifter design: it is 83.3% on average and it exceeds 200% after 5 years of operation for the standard Low-to-High and the NDLSs level shifters, which is 10x higher than the BTI-induced delay degradation of standard CMOS logic cells. Similarly, we show that the examined designs can suffer from an average 38.2% additional power consumption after 5 years of operation that, however, reaches 180% for the standard level-shifter and exceeds 163% for the NDLSs design. The high susceptibility of these designs to BTI is attributed to their differential signaling structure, combined with the very low supply voltage. Moreover, we show that recently proposed level up shifter design employing a voltage step-down technique are much more robust to BTI aging degradation. To the best of our knowledge, this is the first work addressing the effects of BTI on the the delay and power consumption of level shifters.

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More information

Accepted/In Press date: 30 October 2016
e-pub ahead of print date: 9 November 2016
Published date: December 2016
Keywords: level shifters, BTI, aging, multi-voltage, multi-power domains, propagation delay, power consumption
Organisations: Electronics & Computer Science

Identifiers

Local EPrints ID: 403410
URI: http://eprints.soton.ac.uk/id/eprint/403410
ISSN: 0026-2714
PURE UUID: 2b502c53-eef3-43f0-b7ab-a5f16d284fe1

Catalogue record

Date deposited: 30 Nov 2016 12:59
Last modified: 17 Jul 2017 17:42

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Contributors

Author: Basel Halak
Author: Vasileios Tenentes
Author: Daniele Rossi

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