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A circuit model for defective bilayer graphene transistors

A circuit model for defective bilayer graphene transistors
A circuit model for defective bilayer graphene transistors
This paper investigates the behaviour of a defective single-gate bilayer graphene transistor. Point defects were introduced into pristine graphene crystal structure using a tightly focused helium ion beam. The transfer characteristics of the exposed transistors were measured ex-situ for different defect concentrations. The channel peak resistance increased with increasing defect concentration whilst the on–off ratio showed a decreasing trend for both electrons and holes. To understand the electrical behaviour of the transistors, a circuit model for bilayer graphene is developed which shows a very good agreement when validated against experimental data. The model allowed parameter extraction of bilayer transistor and can be implemented in circuit level simulators.

33-38
Umoh, Ime
2faec90d-20fc-4cf8-9595-f40e7c0f5cc6
Moktadir, Zakaria
34472668-ffda-4287-8fea-2c4f3bf1e2fa
Kazmierski, Tomasz
a97d7958-40c3-413f-924d-84545216092a
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9
Umoh, Ime
2faec90d-20fc-4cf8-9595-f40e7c0f5cc6
Moktadir, Zakaria
34472668-ffda-4287-8fea-2c4f3bf1e2fa
Kazmierski, Tomasz
a97d7958-40c3-413f-924d-84545216092a
Mizuta, Hiroshi
f14d5ffc-751b-472b-8dba-c8518c6840b9

Umoh, Ime, Moktadir, Zakaria and Kazmierski, Tomasz et al. (2016) A circuit model for defective bilayer graphene transistors. Solid-State Electronics, 119, supplement p 33-38, 33-38. (doi:10.1016/j.sse.2016.02.003).

Record type: Article

Abstract

This paper investigates the behaviour of a defective single-gate bilayer graphene transistor. Point defects were introduced into pristine graphene crystal structure using a tightly focused helium ion beam. The transfer characteristics of the exposed transistors were measured ex-situ for different defect concentrations. The channel peak resistance increased with increasing defect concentration whilst the on–off ratio showed a decreasing trend for both electrons and holes. To understand the electrical behaviour of the transistors, a circuit model for bilayer graphene is developed which shows a very good agreement when validated against experimental data. The model allowed parameter extraction of bilayer transistor and can be implemented in circuit level simulators.

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Published date: 11 February 2016
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 405472
URI: https://eprints.soton.ac.uk/id/eprint/405472
PURE UUID: f38cc329-58fa-4339-952f-95cde4c21ae1

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Date deposited: 03 Feb 2017 10:37
Last modified: 19 Jul 2019 19:25

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