Kelvin Probe Force Microscopy (KPFM) for nanoelectronic device characterisation

Abstract

This project is to develope a new method of characterization for Silicon-nano-wire (SiNW) FET and SET devices by using KPFM technology to derive the information of local surface potential change on the channel of SiNW devices. The surface potential is related to many important parameters on material's surface, e.g. fixed surface charge, doping profile variation, distribution of charge carriers under applied bias, and individual dopant atoms near the surface. Those parameters are strongly related to the characteristics of SiNW devices.

The KPFM equipment is designed to extract the contact potential difference (CPD) between tip and sample. The change of CPD is related to the Fermi energy level in materials. Therefore any factors which induce Fermi energy level change inside material are detectable. The significantly improved lateral resolution (sub-nanometer) gives us confidence for the measurement of local surface potential variation.

Much of the time has been dedicated for the KPFM equipment calibration and optimization. By the end of PhD project the surface potential characterisation of three different types of the silicon-nano-wire (SiNW) devices (uniformly doped SiNW, n-pn SiNW Field-Effect-Transistor (FET), and n-p-n-p-n SiNW Single-Electron-Transistor (SET)) has been achieved. By using surface potential information the surface traped charge and change in local resistivity in SiNW is successfully estimated and the result is confirmed well agreed with the characterisation of other conventional method. This characterisation result also suggest the accuracy of local surface potential measurement. In-situ potential mapping and profiling of n-p-n FET channel under device operation has been successfully performed. By comparing the data with simulation and electrical characterisation of the same device, correspondence between the line-shape of the surface potential and electrical field profiles and device parameters has been clarified for the first time. An attempt has been made to observe the surface potential of the channel of SET devices which have shown clear Coulomb oscillation at low temperature (5K). The formation of a conductive channel in 330-nm-wide SiNW channel by the side gate modulation is successfully observed.

Four main achievements can be claimed at the end of this project. First, the metallurgic p-n junction in thin (50nm) SOI has been first time ever detected by E_x curve extraction from measured potential profile and the E_x curve was used to study the charge transport in the n-p-n structure under different biasing condition. Secondary, the novel single side gate doping modulated single electron transistors was fabricated and shown Coulomb oscillations which was consistent with theoretical predictions. Furthermore, the operation of FET/SET was investigated by scanned high resolution surface potential profile which revealed the status of p-n junction under biasing. In the end, this study discovered a new method to investigate nano-electronic devices by KPFM scan and more information such as change in build-in voltage at low temperature, and charge in charge state of island can be extracted if the high vacuum and low temperature is applied.

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