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Will it blend? Merging heterogeneous cores

Will it blend? Merging heterogeneous cores
Will it blend? Merging heterogeneous cores
Heterogeneous processors allow different performance/power operation points by pairing high performance Outof-Order (OoO) cores with small energy efficient In-Order cores. Timely switching between the cores types allows the system to tailor to energy budget and performance constraints. Each core migration incurs a penalty though, which is caused by the necessary transfer of state between cores. Heterogeneous systems are kept from further increasing performance through more frequent migrations, as the benefits are suppressed by these overheads. Sharing some of the components between cores can reduce the transfer overheads and potentially overcome this problem. However, multiplexing core components can have also an adverse effect on performance when done without taking into consideration the extra latency. For this reason, it is critical to strike a balance between component sharing and complexity.
In our work, we show that sharing the translation mechanism and the level 2 caches capture most of the potential benefits for in-order cores, while the branch predictor state is most critical for Out-of-Order cores. Finally, even under a best case scenario, on average 10% of applications could transfer to an OoO core to gain extra performance, while 6% of execution could migrate to In-Order cores saving significant energy, without incurring any penalty to the system. Under a more relaxed trade-off policy, benefits increase significantly as, on average, for 66% of the time executed a migration to the opposite core to improve the energy delay product.
Heterogeneous multiprocessors, HMP, Out-of- Order, In-Order, memory translation, TLB, cache memory, gem5, simulation, branch prediction
Vougioukas, Ilias
b5654d64-ff5c-43ab-a005-97a72cc343d7
Sandberg, Andreas
d09c2a2a-151d-439c-b258-b852eeb56e33
Diestelhorst, Stephan
80286a84-4bcb-432e-9557-96bc4063df63
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Merrett, Geoff
89b3a696-41de-44c3-89aa-b0aa29f54020
Vougioukas, Ilias
b5654d64-ff5c-43ab-a005-97a72cc343d7
Sandberg, Andreas
d09c2a2a-151d-439c-b258-b852eeb56e33
Diestelhorst, Stephan
80286a84-4bcb-432e-9557-96bc4063df63
Al-Hashimi, Bashir
0b29c671-a6d2-459c-af68-c4614dce3b5d
Merrett, Geoff
89b3a696-41de-44c3-89aa-b0aa29f54020

Vougioukas, Ilias, Sandberg, Andreas, Diestelhorst, Stephan, Al-Hashimi, Bashir and Merrett, Geoff (2018) Will it blend? Merging heterogeneous cores. At Adaptive Many-Core Architectures and Systems Workshop (15/06/18) Adaptive Many-Core Architectures and Systems Workshop, York, United Kingdom. 13 - 15 Jun 2018. 3 pp. (In Press)

Record type: Conference or Workshop Item (Paper)

Abstract

Heterogeneous processors allow different performance/power operation points by pairing high performance Outof-Order (OoO) cores with small energy efficient In-Order cores. Timely switching between the cores types allows the system to tailor to energy budget and performance constraints. Each core migration incurs a penalty though, which is caused by the necessary transfer of state between cores. Heterogeneous systems are kept from further increasing performance through more frequent migrations, as the benefits are suppressed by these overheads. Sharing some of the components between cores can reduce the transfer overheads and potentially overcome this problem. However, multiplexing core components can have also an adverse effect on performance when done without taking into consideration the extra latency. For this reason, it is critical to strike a balance between component sharing and complexity.
In our work, we show that sharing the translation mechanism and the level 2 caches capture most of the potential benefits for in-order cores, while the branch predictor state is most critical for Out-of-Order cores. Finally, even under a best case scenario, on average 10% of applications could transfer to an OoO core to gain extra performance, while 6% of execution could migrate to In-Order cores saving significant energy, without incurring any penalty to the system. Under a more relaxed trade-off policy, benefits increase significantly as, on average, for 66% of the time executed a migration to the opposite core to improve the energy delay product.

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More information

Accepted/In Press date: 30 May 2018
Venue - Dates: Adaptive Many-Core Architectures and Systems Workshop, York, United Kingdom, 2018-06-13 - 2018-06-15
Keywords: Heterogeneous multiprocessors, HMP, Out-of- Order, In-Order, memory translation, TLB, cache memory, gem5, simulation, branch prediction

Identifiers

Local EPrints ID: 423222
URI: https://eprints.soton.ac.uk/id/eprint/423222
PURE UUID: 19b1ecba-dcd5-41cf-894b-7993c2e99173
ORCID for Ilias Vougioukas: ORCID iD orcid.org/0000-0003-1444-4326
ORCID for Geoff Merrett: ORCID iD orcid.org/0000-0003-4980-3894

Catalogue record

Date deposited: 19 Sep 2018 16:30
Last modified: 06 Oct 2018 00:35

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